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mediatek: move mt7623a-unielec-u7623*.dts* out of patch
Instead of adding those device tree sources using a patch, simply move them to the newly created dts folder. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
parent
5bab472a11
commit
c7293bcfcc
@ -0,0 +1,18 @@
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/*
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* Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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/dts-v1/;
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#include "mt7623a-unielec-u7623-02-emmc.dtsi"
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/ {
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model = "UniElec U7623-02 eMMC (512M RAM)";
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compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
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memory@80000000 {
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device_type = "memory";
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reg = <0 0x80000000 0 0x20000000>;
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};
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};
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340
target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi
Normal file
340
target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi
Normal file
@ -0,0 +1,340 @@
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/*
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* Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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#include <dt-bindings/input/input.h>
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#include "mt7623.dtsi"
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#include "mt6323.dtsi"
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/ {
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compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
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aliases {
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serial2 = &uart2;
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};
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chosen {
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bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
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stdout-path = "serial2:115200n8";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6323_vproc_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6323_vproc_reg>;
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};
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cpu@2 {
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proc-supply = <&mt6323_vproc_reg>;
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};
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cpu@3 {
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proc-supply = <&mt6323_vproc_reg>;
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};
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins_a>;
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factory {
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label = "factory";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 256 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins_unielec>;
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led3 {
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label = "u7623-01:green:led3";
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gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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};
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led4 {
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label = "u7623-01:green:led4";
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gpios = <&pio 15 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&crypto {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "trgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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mt7530: switch@0 {
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compatible = "mediatek,mt7530";
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};
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};
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};
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&mt7530 {
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compatible = "mediatek,mt7530";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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pinctrl-names = "default";
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mediatek,mcm;
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resets = <ðsys 2>;
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reset-names = "mcm";
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core-supply = <&mt6323_vpa_reg>;
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io-supply = <&mt6323_vemc3v3_reg>;
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dsa,mii-bus = <&mdio>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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port@0 {
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reg = <0>;
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label = "lan0";
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cpu = <&cpu_port0>;
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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cpu = <&cpu_port0>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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cpu = <&cpu_port0>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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cpu = <&cpu_port0>;
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};
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port@4 {
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reg = <4>;
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label = "wan";
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cpu = <&cpu_port0>;
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};
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cpu_port0: port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "trgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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status = "okay";
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-mmc-highspeed;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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};
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&pio {
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key_pins_a: keys-alt {
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pins-keys {
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pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
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<MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
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input-enable;
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};
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};
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led_pins_unielec: leds-unielec {
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pins-leds {
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pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
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<MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
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};
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};
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mmc0_pins_default: mmc0default {
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pins_cmd_dat {
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pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
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<MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
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<MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
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<MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
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<MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
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<MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
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<MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
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<MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
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<MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
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input-enable;
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bias-pull-up;
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};
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pins_clk {
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pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
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bias-pull-down;
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};
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pins_rst {
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pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
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bias-pull-up;
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};
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};
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mmc0_pins_uhs: mmc0 {
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pins_cmd_dat {
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pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
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<MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
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<MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
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<MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
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<MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
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<MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
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<MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
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<MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
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<MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <MTK_DRIVE_2mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins_clk {
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pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
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drive-strength = <MTK_DRIVE_2mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
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};
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pins_rst {
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pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
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bias-pull-up;
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};
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};
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pcie_default: pcie_pin_default {
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pins_cmd_dat {
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pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
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<MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
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bias-disable;
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};
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_pins_a>;
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status = "okay";
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};
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&pwrap {
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mt6323 {
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mt6323led: led {
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compatible = "mediatek,mt6323-led";
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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label = "led0";
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};
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};
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins_b>;
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status = "okay";
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};
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&usb1 {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_3p3v>;
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status = "okay";
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};
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&u3phy1 {
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status = "okay";
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};
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&u3phy2 {
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status = "okay";
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mediatek,phy-switch = <&hifsys>;
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_default>;
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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pcie@2,0 {
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status = "okay";
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};
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};
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&pcie1_phy {
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status = "okay";
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};
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@ -63,6 +63,7 @@ define Device/unielec_u7623-emmc
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# When we use FIT images, U-Boot will populate the /memory node with the correct
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# memory size discovered from the preloader, so we don't need separate builds.
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DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
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DEVICE_DTS_DIR := ../dts
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SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m
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UBOOT_ENVSIZE := 0x1000
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UBOOT_OFFSET := 256k
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@ -83,6 +84,7 @@ define Device/unielec_u7623-02-emmc-512m-legacy
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DEVICE_MODEL := U7623-02
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DEVICE_VARIANT := eMMC/512MiB RAM (legacy image)
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DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
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DEVICE_DTS_DIR := ../dts
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KERNEL_NAME := zImage
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KERNEL := kernel-bin | append-dtb | uImage none
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KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
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@ -1,387 +0,0 @@
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From 004eb24e939b5b31f828333f37fb5cb2a877d6f2 Mon Sep 17 00:00:00 2001
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From: Kristian Evensen <kristian.evensen@gmail.com>
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Date: Sun, 17 Jun 2018 14:41:47 +0200
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Subject: [PATCH] arm: dts: Add Unielec U7623 DTS
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---
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arch/arm/boot/dts/Makefile | 1 +
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.../dts/mt7623a-unielec-u7623-02-emmc-512m.dts | 18 +
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.../boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi | 366 +++++++++++++++++++++
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3 files changed, 385 insertions(+)
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create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
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create mode 100644 arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -1272,6 +1272,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
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mt7623a-rfb-nand.dtb \
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mt7623n-rfb-emmc.dtb \
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mt7623n-bananapi-bpi-r2.dtb \
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+ mt7623a-unielec-u7623-02-emmc-512m.dtb \
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mt7629-rfb.dtb \
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mt8127-moose.dtb \
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mt8135-evbp1.dtb
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--- /dev/null
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+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc-512m.dts
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@@ -0,0 +1,18 @@
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+/*
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+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
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+ *
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+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
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+ */
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+
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+/dts-v1/;
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+#include "mt7623a-unielec-u7623-02-emmc.dtsi"
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+
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+/ {
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+ model = "UniElec U7623-02 eMMC (512M RAM)";
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+ compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623";
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+
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+ memory@80000000 {
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+ device_type = "memory";
|
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+ reg = <0 0x80000000 0 0x20000000>;
|
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+ };
|
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/mt7623a-unielec-u7623-02-emmc.dtsi
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@@ -0,0 +1,340 @@
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+/*
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+ * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
|
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+ *
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+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
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+ */
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+
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+#include <dt-bindings/input/input.h>
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+#include "mt7623.dtsi"
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+#include "mt6323.dtsi"
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+
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+/ {
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+ compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
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+
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+ aliases {
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+ serial2 = &uart2;
|
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+ };
|
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+
|
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+ chosen {
|
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+ bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
|
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+ stdout-path = "serial2:115200n8";
|
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+ };
|
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+
|
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+ cpus {
|
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+ cpu@0 {
|
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+ proc-supply = <&mt6323_vproc_reg>;
|
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+ };
|
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+
|
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+ cpu@1 {
|
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+ proc-supply = <&mt6323_vproc_reg>;
|
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+ };
|
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+
|
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+ cpu@2 {
|
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+ proc-supply = <&mt6323_vproc_reg>;
|
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+ };
|
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+
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+ cpu@3 {
|
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+ proc-supply = <&mt6323_vproc_reg>;
|
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+ };
|
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+ };
|
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+
|
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+ reg_1p8v: regulator-1p8v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "fixed-1.8V";
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_3p3v: regulator-3p3v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "fixed-3.3V";
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ reg_5v: regulator-5v {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "fixed-5V";
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ gpio-keys {
|
||||
+ compatible = "gpio-keys";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&key_pins_a>;
|
||||
+
|
||||
+ factory {
|
||||
+ label = "factory";
|
||||
+ linux,code = <KEY_RESTART>;
|
||||
+ gpios = <&pio 256 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&led_pins_unielec>;
|
||||
+
|
||||
+ led3 {
|
||||
+ label = "u7623-01:green:led3";
|
||||
+ gpios = <&pio 14 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+ led4 {
|
||||
+ label = "u7623-01:green:led4";
|
||||
+ gpios = <&pio 15 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&crypto {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+ð {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ gmac0: mac@0 {
|
||||
+ compatible = "mediatek,eth-mac";
|
||||
+ reg = <0>;
|
||||
+ phy-mode = "trgmii";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ pause;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mdio: mdio-bus {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ mt7530: switch@0 {
|
||||
+ compatible = "mediatek,mt7530";
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mt7530 {
|
||||
+ compatible = "mediatek,mt7530";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ reg = <0>;
|
||||
+ pinctrl-names = "default";
|
||||
+ mediatek,mcm;
|
||||
+ resets = <ðsys 2>;
|
||||
+ reset-names = "mcm";
|
||||
+ core-supply = <&mt6323_vpa_reg>;
|
||||
+ io-supply = <&mt6323_vemc3v3_reg>;
|
||||
+
|
||||
+ dsa,mii-bus = <&mdio>;
|
||||
+
|
||||
+ ports {
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+ reg = <0>;
|
||||
+
|
||||
+ port@0 {
|
||||
+ reg = <0>;
|
||||
+ label = "lan0";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@1 {
|
||||
+ reg = <1>;
|
||||
+ label = "lan1";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@2 {
|
||||
+ reg = <2>;
|
||||
+ label = "lan2";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@3 {
|
||||
+ reg = <3>;
|
||||
+ label = "lan3";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ port@4 {
|
||||
+ reg = <4>;
|
||||
+ label = "wan";
|
||||
+ cpu = <&cpu_port0>;
|
||||
+ };
|
||||
+
|
||||
+ cpu_port0: port@6 {
|
||||
+ reg = <6>;
|
||||
+ label = "cpu";
|
||||
+ ethernet = <&gmac0>;
|
||||
+ phy-mode = "trgmii";
|
||||
+
|
||||
+ fixed-link {
|
||||
+ speed = <1000>;
|
||||
+ full-duplex;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&mmc0 {
|
||||
+ pinctrl-names = "default", "state_uhs";
|
||||
+ pinctrl-0 = <&mmc0_pins_default>;
|
||||
+ pinctrl-1 = <&mmc0_pins_uhs>;
|
||||
+ status = "okay";
|
||||
+ bus-width = <8>;
|
||||
+ max-frequency = <50000000>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ vmmc-supply = <®_3p3v>;
|
||||
+ vqmmc-supply = <®_1p8v>;
|
||||
+ non-removable;
|
||||
+};
|
||||
+
|
||||
+&pio {
|
||||
+ key_pins_a: keys-alt {
|
||||
+ pins-keys {
|
||||
+ pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
|
||||
+ <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
|
||||
+ input-enable;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ led_pins_unielec: leds-unielec {
|
||||
+ pins-leds {
|
||||
+ pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
|
||||
+ <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mmc0_pins_default: mmc0default {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
||||
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
||||
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
||||
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
|
||||
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
|
||||
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
|
||||
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
|
||||
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
|
||||
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
|
||||
+ input-enable;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+
|
||||
+ pins_clk {
|
||||
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
||||
+ bias-pull-down;
|
||||
+ };
|
||||
+
|
||||
+ pins_rst {
|
||||
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ mmc0_pins_uhs: mmc0 {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
|
||||
+ <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
|
||||
+ <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
|
||||
+ <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
|
||||
+ <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
|
||||
+ <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
|
||||
+ <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
|
||||
+ <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
|
||||
+ <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
|
||||
+ input-enable;
|
||||
+ drive-strength = <MTK_DRIVE_2mA>;
|
||||
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
|
||||
+ };
|
||||
+
|
||||
+ pins_clk {
|
||||
+ pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
|
||||
+ drive-strength = <MTK_DRIVE_2mA>;
|
||||
+ bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
|
||||
+ };
|
||||
+
|
||||
+ pins_rst {
|
||||
+ pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
|
||||
+ bias-pull-up;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pcie_default: pcie_pin_default {
|
||||
+ pins_cmd_dat {
|
||||
+ pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
|
||||
+ <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
|
||||
+ bias-disable;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pwm_pins_a>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pwrap {
|
||||
+ mt6323 {
|
||||
+ mt6323led: led {
|
||||
+ compatible = "mediatek,mt6323-led";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ led@0 {
|
||||
+ reg = <0>;
|
||||
+ label = "led0";
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart2_pins_b>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb1 {
|
||||
+ vusb33-supply = <®_3p3v>;
|
||||
+ vbus-supply = <®_3p3v>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&u3phy2 {
|
||||
+ status = "okay";
|
||||
+ mediatek,phy-switch = <&hifsys>;
|
||||
+};
|
||||
+
|
||||
+&pcie {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pcie_default>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ pcie@1,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ pcie@2,0 {
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pcie1_phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
Loading…
Reference in New Issue
Block a user