mediatek: filogic: add efuse layout to mt7986a.dtsi

efuse is used to store board-specific settings of some of the in-SoC
peripherals. Add it to device tree, so it gets probed on boot and can
be accessed by other drivers.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
Daniel Golle 2022-09-29 18:50:23 +01:00
parent 243a2184f2
commit b18b5a7ca3

View File

@ -355,6 +355,99 @@
}; };
}; };
efuse: efuse@11d00000 {
compatible = "mediatek,mt7986-efuse",
"mediatek,efuse";
reg = <0 0x11d00000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
thermal_calibration: calib@274 {
reg = <0x274 0xc>;
};
comb_auto_load_valid: usb3-alv-imp@8da {
reg = <0x8da 1>;
bits = <0 1>;
};
comb_rx_imp_p0: usb3-rx-imp@8d8 {
reg = <0x8d8 1>;
bits = <0 5>;
};
comb_tx_imp_p0: usb3-tx-imp@8d8 {
reg = <0x8d8 2>;
bits = <5 5>;
};
comb_intr_p0: usb3-intr@8d9 {
reg = <0x8d9 1>;
bits = <2 6>;
};
u2_auto_load_valid_p0: usb2-alv-p0@8e0 {
reg = <0x8e0 1>;
bits = <0 1>;
};
u2_intr_p0: usb2-intr-p0@8e0 {
reg = <0x8e0 1>;
bits = <1 5>;
};
u2_auto_load_valid_p1: usb2-alv-p1@8e0 {
reg = <0x8e0 2>;
bits = <6 1>;
};
u2_intr_p1: usb2-intr-p1@8e0 {
reg = <0x8e0 2>;
bits = <7 5>;
};
pcie_rx_imp_ln0: pcie-rx-imp@8d0 {
reg = <0x8d0 1>;
bits = <0 5>;
};
pcie_tx_imp_ln0: pcie-tx-imp@8d0 {
reg = <0x8d0 2>;
bits = <5 5>;
};
pcie_intr_ln0: pcie-intr@8d1 {
reg = <0x8d1 1>;
bits = <2 6>;
};
pcie_auto_load_valid_ln0: pcie-ln0-alv@8d4 {
reg = <0x8d4 1>;
bits = <0 1>;
};
pcie_rx_imp_ln1: pcie-rx-imp@8d2 {
reg = <0x8d2 1>;
bits = <0 5>;
};
pcie_tx_imp_ln1: pcie-tx-imp@8d2 {
reg = <0x8d2 2>;
bits = <5 5>;
};
pcie_intr_ln1: pcie-intr@8d3 {
reg = <0x8d3 1>;
bits = <2 6>;
};
pcie_auto_load_valid_ln1: pcie-ln1-alv@8d4 {
reg = <0x8d4 1>;
bits = <1 1>;
};
};
usb_phy: t-phy@11e10000 { usb_phy: t-phy@11e10000 {
compatible = "mediatek,mt7986-tphy", compatible = "mediatek,mt7986-tphy",
"mediatek,generic-tphy-v2"; "mediatek,generic-tphy-v2";