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generic: 5.15: move MIPS cpuinfo patch from pending to backport
Move MIPS cpuinfo patch from pending to backport as it got merged upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi
parent
8246ab6a27
commit
b182634689
@ -0,0 +1,162 @@
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From 626bfa03729959ea9917181fb3d8ffaa1594d02a Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Wed, 13 Oct 2021 22:40:18 -0700
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Subject: [PATCH 1/1] MIPS: kernel: proc: add CPU option reporting
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Many MIPS CPUs have optional CPU features which are not activated for
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all CPU cores. Print the CPU options, which are implemented in the core,
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in /proc/cpuinfo. This makes it possible to see which features are
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supported and which are not supported. This should cover all standard
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MIPS extensions. Before, it only printed information about the main MIPS
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ASEs.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Changes from original patch[0]:
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- Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a
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("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()")
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- Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad,
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mm_full
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- Use seq_puts instead of seq_printf as suggested by checkpatch
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- Minor commit message reword
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[0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/
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Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
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Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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---
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arch/mips/kernel/proc.c | 122 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 122 insertions(+)
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--- a/arch/mips/kernel/proc.c
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+++ b/arch/mips/kernel/proc.c
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@@ -138,6 +138,128 @@ static int show_cpuinfo(struct seq_file
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seq_printf(m, "micromips kernel\t: %s\n",
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(read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
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}
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+
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+ seq_puts(m, "Options implemented\t:");
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+ if (cpu_has_tlb)
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+ seq_puts(m, " tlb");
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+ if (cpu_has_ftlb)
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+ seq_puts(m, " ftlb");
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+ if (cpu_has_tlbinv)
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+ seq_puts(m, " tlbinv");
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+ if (cpu_has_segments)
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+ seq_puts(m, " segments");
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+ if (cpu_has_rixiex)
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+ seq_puts(m, " rixiex");
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+ if (cpu_has_ldpte)
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+ seq_puts(m, " ldpte");
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+ if (cpu_has_maar)
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+ seq_puts(m, " maar");
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+ if (cpu_has_rw_llb)
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+ seq_puts(m, " rw_llb");
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+ if (cpu_has_4kex)
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+ seq_puts(m, " 4kex");
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+ if (cpu_has_3k_cache)
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+ seq_puts(m, " 3k_cache");
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+ if (cpu_has_4k_cache)
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+ seq_puts(m, " 4k_cache");
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+ if (cpu_has_tx39_cache)
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+ seq_puts(m, " tx39_cache");
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+ if (cpu_has_octeon_cache)
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+ seq_puts(m, " octeon_cache");
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+ if (cpu_has_fpu)
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+ seq_puts(m, " fpu");
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+ if (cpu_has_32fpr)
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+ seq_puts(m, " 32fpr");
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+ if (cpu_has_cache_cdex_p)
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+ seq_puts(m, " cache_cdex_p");
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+ if (cpu_has_cache_cdex_s)
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+ seq_puts(m, " cache_cdex_s");
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+ if (cpu_has_prefetch)
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+ seq_puts(m, " prefetch");
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+ if (cpu_has_mcheck)
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+ seq_puts(m, " mcheck");
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+ if (cpu_has_ejtag)
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+ seq_puts(m, " ejtag");
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+ if (cpu_has_llsc)
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+ seq_puts(m, " llsc");
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+ if (cpu_has_guestctl0ext)
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+ seq_puts(m, " guestctl0ext");
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+ if (cpu_has_guestctl1)
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+ seq_puts(m, " guestctl1");
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+ if (cpu_has_guestctl2)
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+ seq_puts(m, " guestctl2");
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+ if (cpu_has_guestid)
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+ seq_puts(m, " guestid");
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+ if (cpu_has_drg)
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+ seq_puts(m, " drg");
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+ if (cpu_has_rixi)
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+ seq_puts(m, " rixi");
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+ if (cpu_has_lpa)
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+ seq_puts(m, " lpa");
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+ if (cpu_has_mvh)
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+ seq_puts(m, " mvh");
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+ if (cpu_has_vtag_icache)
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+ seq_puts(m, " vtag_icache");
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+ if (cpu_has_dc_aliases)
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+ seq_puts(m, " dc_aliases");
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+ if (cpu_has_ic_fills_f_dc)
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+ seq_puts(m, " ic_fills_f_dc");
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+ if (cpu_has_pindexed_dcache)
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+ seq_puts(m, " pindexed_dcache");
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+ if (cpu_has_userlocal)
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+ seq_puts(m, " userlocal");
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+ if (cpu_has_nofpuex)
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+ seq_puts(m, " nofpuex");
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+ if (cpu_has_vint)
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+ seq_puts(m, " vint");
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+ if (cpu_has_veic)
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+ seq_puts(m, " veic");
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+ if (cpu_has_inclusive_pcaches)
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+ seq_puts(m, " inclusive_pcaches");
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+ if (cpu_has_perf_cntr_intr_bit)
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+ seq_puts(m, " perf_cntr_intr_bit");
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+ if (cpu_has_ufr)
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+ seq_puts(m, " ufr");
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+ if (cpu_has_fre)
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+ seq_puts(m, " fre");
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+ if (cpu_has_cdmm)
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+ seq_puts(m, " cdmm");
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+ if (cpu_has_small_pages)
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+ seq_puts(m, " small_pages");
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+ if (cpu_has_nan_legacy)
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+ seq_puts(m, " nan_legacy");
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+ if (cpu_has_nan_2008)
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+ seq_puts(m, " nan_2008");
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+ if (cpu_has_ebase_wg)
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+ seq_puts(m, " ebase_wg");
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+ if (cpu_has_badinstr)
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+ seq_puts(m, " badinstr");
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+ if (cpu_has_badinstrp)
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+ seq_puts(m, " badinstrp");
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+ if (cpu_has_contextconfig)
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+ seq_puts(m, " contextconfig");
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+ if (cpu_has_perf)
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+ seq_puts(m, " perf");
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+ if (cpu_has_mac2008_only)
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+ seq_puts(m, " mac2008_only");
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+ if (cpu_has_ftlbparex)
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+ seq_puts(m, " ftlbparex");
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+ if (cpu_has_gsexcex)
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+ seq_puts(m, " gsexcex");
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+ if (cpu_has_shared_ftlb_ram)
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+ seq_puts(m, " shared_ftlb_ram");
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+ if (cpu_has_shared_ftlb_entries)
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+ seq_puts(m, " shared_ftlb_entries");
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+ if (cpu_has_mipsmt_pertccounters)
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+ seq_puts(m, " mipsmt_pertccounters");
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+ if (cpu_has_mmid)
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+ seq_puts(m, " mmid");
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+ if (cpu_has_mm_sysad)
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+ seq_puts(m, " mm_sysad");
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+ if (cpu_has_mm_full)
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+ seq_puts(m, " mm_full");
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+ seq_puts(m, "\n");
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+
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seq_printf(m, "shadow register sets\t: %d\n",
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cpu_data[n].srsets);
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seq_printf(m, "kscratch registers\t: %d\n",
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@ -0,0 +1,62 @@
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From 1cab5bd69eb1f995ced2d7576cb15f8a8941fd85 Mon Sep 17 00:00:00 2001
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From: Tiezhu Yang <yangtiezhu@loongson.cn>
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Date: Thu, 25 Nov 2021 19:39:32 +0800
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Subject: [PATCH 1/1] MIPS: Fix using smp_processor_id() in preemptible in
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show_cpuinfo()
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There exists the following issue under DEBUG_PREEMPT:
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BUG: using smp_processor_id() in preemptible [00000000] code: systemd/1
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caller is show_cpuinfo+0x460/0xea0
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...
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Call Trace:
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[<ffffffff8020f0dc>] show_stack+0x94/0x128
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[<ffffffff80e6cab4>] dump_stack_lvl+0x94/0xd8
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[<ffffffff80e74c5c>] check_preemption_disabled+0x104/0x110
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[<ffffffff802209c8>] show_cpuinfo+0x460/0xea0
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[<ffffffff80539d54>] seq_read_iter+0xfc/0x4f8
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[<ffffffff804fcc10>] new_sync_read+0x110/0x1b8
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[<ffffffff804ff57c>] vfs_read+0x1b4/0x1d0
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[<ffffffff804ffb18>] ksys_read+0xd0/0x110
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[<ffffffff8021c090>] syscall_common+0x34/0x58
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We can see the following call trace:
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show_cpuinfo()
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cpu_has_fpu
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current_cpu_data
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smp_processor_id()
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$ addr2line -f -e vmlinux 0xffffffff802209c8
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show_cpuinfo
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arch/mips/kernel/proc.c:188
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$ head -188 arch/mips/kernel/proc.c | tail -1
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if (cpu_has_fpu)
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arch/mips/include/asm/cpu-features.h
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# define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU)
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arch/mips/include/asm/cpu-info.h
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#define current_cpu_data cpu_data[smp_processor_id()]
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Based on the above analysis, fix the issue by using raw_cpu_has_fpu
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which calls raw_smp_processor_id() in show_cpuinfo().
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Fixes: 626bfa037299 ("MIPS: kernel: proc: add CPU option reporting")
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Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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---
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arch/mips/kernel/proc.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/mips/kernel/proc.c
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+++ b/arch/mips/kernel/proc.c
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@@ -166,7 +166,7 @@ static int show_cpuinfo(struct seq_file
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seq_puts(m, " tx39_cache");
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if (cpu_has_octeon_cache)
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seq_puts(m, " octeon_cache");
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- if (cpu_has_fpu)
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+ if (raw_cpu_has_fpu)
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seq_puts(m, " fpu");
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if (cpu_has_32fpr)
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seq_puts(m, " 32fpr");
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@ -1,136 +0,0 @@
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From 87ec87c2ad615c1a177cd08ef5fa29fc739f6e50 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Sun, 23 Dec 2018 18:06:53 +0100
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Subject: [PATCH] MIPS: Add CPU option reporting to /proc/cpuinfo
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Many MIPS CPUs have optional CPU features which are not activates for
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all CPU cores. Print the CPU options which are implemented in the core
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in /proc/cpuinfo. This makes it possible to see what features are
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supported and which are not supported. This should cover all standard
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MIPS extensions, before it only printed information about the main MIPS
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ASEs.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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arch/mips/kernel/proc.c | 116 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 116 insertions(+)
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--- a/arch/mips/kernel/proc.c
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+++ b/arch/mips/kernel/proc.c
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@@ -138,6 +138,116 @@ static int show_cpuinfo(struct seq_file
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seq_printf(m, "micromips kernel\t: %s\n",
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(read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no");
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}
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+
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+ seq_printf(m, "Options implemented\t:");
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+ if (cpu_has_tlb)
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+ seq_printf(m, "%s", " tlb");
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+ if (cpu_has_ftlb)
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+ seq_printf(m, "%s", " ftlb");
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+ if (cpu_has_tlbinv)
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+ seq_printf(m, "%s", " tlbinv");
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+ if (cpu_has_segments)
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+ seq_printf(m, "%s", " segments");
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+ if (cpu_has_rixiex)
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+ seq_printf(m, "%s", " rixiex");
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+ if (cpu_has_ldpte)
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+ seq_printf(m, "%s", " ldpte");
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+ if (cpu_has_maar)
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+ seq_printf(m, "%s", " maar");
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+ if (cpu_has_rw_llb)
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+ seq_printf(m, "%s", " rw_llb");
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+ if (cpu_has_4kex)
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+ seq_printf(m, "%s", " 4kex");
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+ if (cpu_has_3k_cache)
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+ seq_printf(m, "%s", " 3k_cache");
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+ if (cpu_has_4k_cache)
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+ seq_printf(m, "%s", " 4k_cache");
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+ if (cpu_has_tx39_cache)
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+ seq_printf(m, "%s", " tx39_cache");
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+ if (cpu_has_octeon_cache)
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+ seq_printf(m, "%s", " octeon_cache");
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+ if (cpu_has_fpu)
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+ seq_printf(m, "%s", " fpu");
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+ if (cpu_has_32fpr)
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+ seq_printf(m, "%s", " 32fpr");
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+ if (cpu_has_cache_cdex_p)
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+ seq_printf(m, "%s", " cache_cdex_p");
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+ if (cpu_has_cache_cdex_s)
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+ seq_printf(m, "%s", " cache_cdex_s");
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+ if (cpu_has_prefetch)
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+ seq_printf(m, "%s", " prefetch");
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+ if (cpu_has_mcheck)
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+ seq_printf(m, "%s", " mcheck");
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+ if (cpu_has_ejtag)
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+ seq_printf(m, "%s", " ejtag");
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+ if (cpu_has_llsc)
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+ seq_printf(m, "%s", " llsc");
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+ if (cpu_has_guestctl0ext)
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+ seq_printf(m, "%s", " guestctl0ext");
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+ if (cpu_has_guestctl1)
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+ seq_printf(m, "%s", " guestctl1");
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+ if (cpu_has_guestctl2)
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+ seq_printf(m, "%s", " guestctl2");
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+ if (cpu_has_guestid)
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+ seq_printf(m, "%s", " guestid");
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+ if (cpu_has_drg)
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+ seq_printf(m, "%s", " drg");
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+ if (cpu_has_rixi)
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+ seq_printf(m, "%s", " rixi");
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+ if (cpu_has_lpa)
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+ seq_printf(m, "%s", " lpa");
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+ if (cpu_has_mvh)
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+ seq_printf(m, "%s", " mvh");
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+ if (cpu_has_vtag_icache)
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+ seq_printf(m, "%s", " vtag_icache");
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+ if (cpu_has_dc_aliases)
|
|
||||||
+ seq_printf(m, "%s", " dc_aliases");
|
|
||||||
+ if (cpu_has_ic_fills_f_dc)
|
|
||||||
+ seq_printf(m, "%s", " ic_fills_f_dc");
|
|
||||||
+ if (cpu_has_pindexed_dcache)
|
|
||||||
+ seq_printf(m, "%s", " pindexed_dcache");
|
|
||||||
+ if (cpu_has_userlocal)
|
|
||||||
+ seq_printf(m, "%s", " userlocal");
|
|
||||||
+ if (cpu_has_nofpuex)
|
|
||||||
+ seq_printf(m, "%s", " nofpuex");
|
|
||||||
+ if (cpu_has_vint)
|
|
||||||
+ seq_printf(m, "%s", " vint");
|
|
||||||
+ if (cpu_has_veic)
|
|
||||||
+ seq_printf(m, "%s", " veic");
|
|
||||||
+ if (cpu_has_inclusive_pcaches)
|
|
||||||
+ seq_printf(m, "%s", " inclusive_pcaches");
|
|
||||||
+ if (cpu_has_perf_cntr_intr_bit)
|
|
||||||
+ seq_printf(m, "%s", " perf_cntr_intr_bit");
|
|
||||||
+ if (cpu_has_ufr)
|
|
||||||
+ seq_printf(m, "%s", " ufr");
|
|
||||||
+ if (cpu_has_fre)
|
|
||||||
+ seq_printf(m, "%s", " fre");
|
|
||||||
+ if (cpu_has_cdmm)
|
|
||||||
+ seq_printf(m, "%s", " cdmm");
|
|
||||||
+ if (cpu_has_small_pages)
|
|
||||||
+ seq_printf(m, "%s", " small_pages");
|
|
||||||
+ if (cpu_has_nan_legacy)
|
|
||||||
+ seq_printf(m, "%s", " nan_legacy");
|
|
||||||
+ if (cpu_has_nan_2008)
|
|
||||||
+ seq_printf(m, "%s", " nan_2008");
|
|
||||||
+ if (cpu_has_ebase_wg)
|
|
||||||
+ seq_printf(m, "%s", " ebase_wg");
|
|
||||||
+ if (cpu_has_badinstr)
|
|
||||||
+ seq_printf(m, "%s", " badinstr");
|
|
||||||
+ if (cpu_has_badinstrp)
|
|
||||||
+ seq_printf(m, "%s", " badinstrp");
|
|
||||||
+ if (cpu_has_contextconfig)
|
|
||||||
+ seq_printf(m, "%s", " contextconfig");
|
|
||||||
+ if (cpu_has_perf)
|
|
||||||
+ seq_printf(m, "%s", " perf");
|
|
||||||
+ if (cpu_has_shared_ftlb_ram)
|
|
||||||
+ seq_printf(m, "%s", " shared_ftlb_ram");
|
|
||||||
+ if (cpu_has_shared_ftlb_entries)
|
|
||||||
+ seq_printf(m, "%s", " shared_ftlb_entries");
|
|
||||||
+ if (cpu_has_mipsmt_pertccounters)
|
|
||||||
+ seq_printf(m, "%s", " mipsmt_pertccounters");
|
|
||||||
+ seq_printf(m, "\n");
|
|
||||||
+
|
|
||||||
seq_printf(m, "shadow register sets\t: %d\n",
|
|
||||||
cpu_data[n].srsets);
|
|
||||||
seq_printf(m, "kscratch registers\t: %d\n",
|
|
||||||
Loading…
Reference in New Issue
Block a user