Setting the MDC clock to 2.5MHz and changing the mii mode to rgmii seems to fix the communication issues with the ar8316 switch. (ticket #11143)
Tested only on the wbmr-hp-g300h, could affect/break other devices. Signed-off-by: Sebastian Mayr <sebastian.mayr@student.uibk.ac.at> SVN-Revision: 34837
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From 2f9f0ec1ff013934a86a7303c9194f6dc05620c3 Mon Sep 17 00:00:00 2001
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From: Sebastian Mayr <sebastian.mayr@student.uibk.ac.at>
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Date: Thu, 20 Dec 2012 18:34:45 +0100
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Subject: [PATCH 1/2] lantiq_etop: Change MDIO clock
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This patch sets the MDC clock to 2.5MHz which fixes the MDIO communication
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with the ar8316 switch.
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---
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drivers/net/ethernet/lantiq_etop.c | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c
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index e695f71..fc963f6 100644
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--- a/drivers/net/ethernet/lantiq_etop.c
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+++ b/drivers/net/ethernet/lantiq_etop.c
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@@ -83,6 +83,7 @@
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#define LTQ_GBIT_PMAC_HD_CTL 0x8c
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#define LTQ_GBIT_P0_CTL 0x4
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#define LTQ_GBIT_PMAC_RX_IPG 0xa8
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+#define LTQ_GBIT_RGMII_CTL 0x78
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#define PMAC_HD_CTL_AS (1 << 19)
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#define PMAC_HD_CTL_RXSH (1 << 22)
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@@ -92,6 +93,10 @@
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/* Disable MDIO auto polling (0=disable, 1=enable) */
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#define PX_CTL_DMDIO 0x00400000
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+/* MDC clock divider, clock = 25MHz/((MDC_CLOCK + 1) * 2) */
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+#define MDC_CLOCK_MASK 0xff000000
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+#define MDC_CLOCK_OFFSET 24
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+
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/* register information for the gbit's MDIO bus */
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#define MDIO_XR9_REQUEST 0x00008000
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#define MDIO_XR9_READ 0x00000800
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@@ -329,6 +334,9 @@ ltq_etop_gbit_init(struct net_device *dev)
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/* Due to traffic halt when burst length 8,
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replace default IPG value with 0x3B */
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ltq_gbit_w32(0x3B, LTQ_GBIT_PMAC_RX_IPG);
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+ /* set mdc clock to 2.5 MHz */
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+ ltq_gbit_w32_mask(MDC_CLOCK_MASK, 4 << MDC_CLOCK_OFFSET,
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+ LTQ_GBIT_RGMII_CTL);
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}
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static int
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--
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1.7.11.7
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From 4de6a250878c9ce5605838b65acbddf338a7254a Mon Sep 17 00:00:00 2001
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From: Sebastian Mayr <sebastian.mayr@student.uibk.ac.at>
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Date: Thu, 20 Dec 2012 18:52:10 +0100
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Subject: [PATCH 2/2] lantiq_etop: Fix supported modes flag
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---
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drivers/net/ethernet/lantiq_etop.c | 19 ++++++++++---------
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1 file changed, 10 insertions(+), 9 deletions(-)
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diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c
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index fc963f6..b50b91e 100644
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--- a/drivers/net/ethernet/lantiq_etop.c
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+++ b/drivers/net/ethernet/lantiq_etop.c
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@@ -551,6 +551,13 @@ ltq_etop_mdio_probe(struct net_device *dev)
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{
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struct ltq_etop_priv *priv = netdev_priv(dev);
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struct phy_device *phydev = NULL;
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+ u32 phy_supported = (SUPPORTED_10baseT_Half
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+ | SUPPORTED_10baseT_Full
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+ | SUPPORTED_100baseT_Half
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+ | SUPPORTED_100baseT_Full
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+ | SUPPORTED_Autoneg
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+ | SUPPORTED_MII
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+ | SUPPORTED_TP);
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if (of_machine_is_compatible("lantiq,ase"))
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phydev = priv->mii_bus->phy_map[8];
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@@ -570,17 +577,11 @@ ltq_etop_mdio_probe(struct net_device *dev)
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return PTR_ERR(phydev);
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}
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- phydev->supported &= (SUPPORTED_10baseT_Half
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- | SUPPORTED_10baseT_Full
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- | SUPPORTED_100baseT_Half
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- | SUPPORTED_100baseT_Full
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- | SUPPORTED_Autoneg
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- | SUPPORTED_MII
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- | SUPPORTED_TP);
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if (of_machine_is_compatible("lantiq,ar9"))
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- phydev->supported &= SUPPORTED_1000baseT_Half
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- | SUPPORTED_1000baseT_Full;
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+ phy_supported |= SUPPORTED_1000baseT_Half
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+ | SUPPORTED_1000baseT_Full;
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+ phydev->supported &= phy_supported;
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phydev->advertising = phydev->supported;
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priv->phydev = phydev;
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pr_info("%s: attached PHY [%s] (phy_addr=%s, irq=%d)\n",
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--
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1.7.11.7
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