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Export clock states through debugfs
SVN-Revision: 19383
This commit is contained in:
parent
7b5f0de029
commit
ac5d8374d1
@ -7,6 +7,8 @@
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obj-y += prom.o irq.o time.o reset.o setup.o dma.o \
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gpio.o clock.o platform.o
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obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o
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# board specific support
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obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
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@ -0,0 +1,109 @@
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/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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* JZ4740 SoC clock support debugfs entries
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/debugfs.h>
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#include <linux/uaccess.h>
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#include <asm/mach-jz4740/clock.h>
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#include "clock.h"
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static struct dentry *jz4740_clock_debugfs;
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static int jz4740_clock_debugfs_show_enabled(void *data, uint64_t *value)
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{
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struct clk *clk = data;
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*value = clk_is_enabled(clk);
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return 0;
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}
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static int jz4740_clock_debugfs_set_enabled(void *data, uint64_t value)
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{
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struct clk *clk = data;
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if (value)
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return clk_enable(clk);
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else
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clk_disable(clk);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(jz4740_clock_debugfs_ops_enabled,
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jz4740_clock_debugfs_show_enabled,
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jz4740_clock_debugfs_set_enabled,
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"%llu\n");
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static int jz4740_clock_debugfs_show_rate(void *data, uint64_t *value)
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{
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struct clk *clk = data;
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*value = clk_get_rate(clk);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(jz4740_clock_debugfs_ops_rate,
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jz4740_clock_debugfs_show_rate,
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NULL,
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"%llu\n");
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void jz4740_clock_debugfs_add_clk(struct clk *clk)
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{
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if (!jz4740_clock_debugfs)
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return;
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clk->debugfs_entry = debugfs_create_dir(clk->name, jz4740_clock_debugfs);
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debugfs_create_file("rate", S_IWUGO | S_IRUGO, clk->debugfs_entry, clk,
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&jz4740_clock_debugfs_ops_rate);
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debugfs_create_file("enabled", S_IRUGO, clk->debugfs_entry, clk,
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&jz4740_clock_debugfs_ops_enabled);
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if (clk->parent) {
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char parent_path[100];
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snprintf(parent_path, 100, "../%s", clk->parent->name);
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clk->debugfs_parent_entry = debugfs_create_symlink("parent",
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clk->debugfs_entry,
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parent_path);
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}
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}
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/* TODO: Locking */
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void jz4740_clock_debugfs_update_parent(struct clk *clk)
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{
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if (clk->debugfs_parent_entry)
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debugfs_remove(clk->debugfs_parent_entry);
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if (clk->parent) {
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char parent_path[100];
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snprintf(parent_path, 100, "../%s", clk->parent->name);
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clk->debugfs_parent_entry = debugfs_create_symlink("parent",
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clk->debugfs_entry,
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parent_path);
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} else {
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clk->debugfs_parent_entry = NULL;
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}
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}
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void jz4740_clock_debugfs_init(void)
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{
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jz4740_clock_debugfs = debugfs_create_dir("jz4740-clock", NULL);
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if (IS_ERR(jz4740_clock_debugfs))
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jz4740_clock_debugfs = NULL;
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}
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@ -23,6 +23,7 @@
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#include <linux/err.h>
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#include <asm/mach-jz4740/clock.h>
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#include "clock.h"
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#define JZ_REG_CLOCK_CTRL 0x00
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#define JZ_REG_CLOCK_LOW_POWER 0x04
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@ -98,27 +99,6 @@ static void __iomem *jz_clock_base;
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static spinlock_t jz_clock_lock;
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static LIST_HEAD(jz_clocks);
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struct clk_ops {
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unsigned long (*get_rate)(struct clk* clk);
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unsigned long (*round_rate)(struct clk *clk, unsigned long rate);
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int (*set_rate)(struct clk* clk, unsigned long rate);
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int (*enable)(struct clk* clk);
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int (*disable)(struct clk* clk);
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int (*set_parent)(struct clk* clk, struct clk *parent);
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};
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struct clk {
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const char *name;
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struct clk* parent;
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uint32_t gate_bit;
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const struct clk_ops *ops;
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struct list_head list;
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};
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struct main_clk {
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struct clk clk;
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uint32_t div_offset;
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@ -176,33 +156,51 @@ static void jz_clk_reg_clear_bits(int reg, uint32_t mask)
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static int jz_clk_enable_gating(struct clk *clk)
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{
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if (clk->gate_bit == JZ4740_CLK_NOT_GATED)
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return -EINVAL;
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jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, clk->gate_bit);
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return 0;
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}
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static int jz_clk_disable_gating(struct clk *clk)
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{
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if (clk->gate_bit == JZ4740_CLK_NOT_GATED)
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return -EINVAL;
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jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, clk->gate_bit);
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return 0;
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}
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static int jz_clk_is_enabled_gating(struct clk *clk)
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{
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if (clk->gate_bit == JZ4740_CLK_NOT_GATED)
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return 1;
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return !(jz_clk_reg_read(JZ_REG_CLOCK_GATE) & clk->gate_bit);
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}
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static unsigned long jz_clk_static_get_rate(struct clk *clk)
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{
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return ((struct static_clk*)clk)->rate;
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}
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static int jz_clk_ko_enable(struct clk* clk)
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static int jz_clk_ko_enable(struct clk *clk)
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{
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jz_clk_reg_set_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE);
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return 0;
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}
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static int jz_clk_ko_disable(struct clk* clk)
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static int jz_clk_ko_disable(struct clk *clk)
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{
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jz_clk_reg_clear_bits(JZ_REG_CLOCK_CTRL, JZ_CLOCK_CTRL_KO_ENABLE);
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return 0;
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}
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static int jz_clk_ko_is_enabled(struct clk *clk)
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{
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return !!(jz_clk_reg_read(JZ_REG_CLOCK_CTRL) & JZ_CLOCK_CTRL_KO_ENABLE);
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}
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static const int pllno[] = {1, 2, 2, 4};
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@ -293,12 +291,13 @@ static struct clk_ops jz_clk_static_ops = {
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.get_rate = jz_clk_static_get_rate,
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.enable = jz_clk_enable_gating,
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.disable = jz_clk_disable_gating,
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.is_enabled = jz_clk_is_enabled_gating,
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};
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static struct static_clk jz_clk_ext = {
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.clk = {
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.name = "ext",
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.gate_bit = (uint32_t)-1,
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.gate_bit = JZ4740_CLK_NOT_GATED,
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.ops = &jz_clk_static_ops,
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},
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};
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@ -369,6 +368,7 @@ static struct main_clk jz_clk_low_speed_peripheral = {
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static const struct clk_ops jz_clk_ko_ops = {
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.enable = jz_clk_ko_enable,
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.disable = jz_clk_ko_disable,
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.is_enabled = jz_clk_ko_is_enabled,
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};
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static struct clk jz_clk_ko = {
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@ -405,14 +405,6 @@ static int jz_clk_i2s_set_parent(struct clk *clk, struct clk *parent)
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return 0;
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}
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static int jz_clk_udc_disable(struct clk *clk)
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{
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jz_clk_reg_clear_bits(JZ_REG_CLOCK_SLEEP_CTRL,
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JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC);
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return 0;
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}
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static int jz_clk_udc_enable(struct clk *clk)
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{
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jz_clk_reg_set_bits(JZ_REG_CLOCK_SLEEP_CTRL,
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@ -421,6 +413,19 @@ static int jz_clk_udc_enable(struct clk *clk)
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return 0;
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}
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static int jz_clk_udc_disable(struct clk *clk)
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{
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jz_clk_reg_clear_bits(JZ_REG_CLOCK_SLEEP_CTRL,
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JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC);
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return 0;
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}
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static int jz_clk_udc_is_enabled(struct clk *clk)
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{
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return !!(jz_clk_reg_read(JZ_REG_CLOCK_SLEEP_CTRL) &
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JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC);
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}
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static int jz_clk_udc_set_parent(struct clk *clk, struct clk *parent)
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{
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if (parent == &jz_clk_pll_half)
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@ -551,23 +556,19 @@ static const struct clk_ops jz_clk_ops_ld = {
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.set_rate = jz_clk_ldclk_set_rate,
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.get_rate = jz_clk_ldclk_get_rate,
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.round_rate = jz_clk_ldclk_round_rate,
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.enable = jz_clk_enable_gating,
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.disable = jz_clk_disable_gating,
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.is_enabled = jz_clk_is_enabled_gating,
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};
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static struct clk jz_clk_ld = {
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.name = "lcd",
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.gate_bit = JZ_CLOCK_GATE_LCD,
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.parent = &jz_clk_pll_half,
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.ops= &jz_clk_ops_ld,
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};
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static struct divided_clk jz_clk_lp = {
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.clk = {
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.name = "lcd_pclk",
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.parent = &jz_clk_pll_half,
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},
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.reg = JZ_REG_CLOCK_LCD,
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.mask = JZ_CLOCK_LCD_DIV_MASK,
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.ops = &jz_clk_ops_ld,
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};
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/* TODO: ops!!! */
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static struct clk jz_clk_cim_mclk = {
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.name = "cim_mclk",
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.parent = &jz_clk_high_speed_peripheral.clk,
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@ -587,6 +588,7 @@ static const struct clk_ops jz_clk_i2s_ops =
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.get_rate = jz_clk_divided_get_rate,
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.enable = jz_clk_enable_gating,
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.disable = jz_clk_disable_gating,
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.is_enabled = jz_clk_is_enabled_gating,
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.set_parent = jz_clk_i2s_set_parent,
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};
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@ -596,6 +598,7 @@ static const struct clk_ops jz_clk_spi_ops =
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.get_rate = jz_clk_divided_get_rate,
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.enable = jz_clk_enable_gating,
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.disable = jz_clk_disable_gating,
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.is_enabled = jz_clk_is_enabled_gating,
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.set_parent = jz_clk_spi_set_parent,
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};
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@ -605,9 +608,20 @@ static const struct clk_ops jz_clk_divided_ops =
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.get_rate = jz_clk_divided_get_rate,
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.enable = jz_clk_enable_gating,
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.disable = jz_clk_disable_gating,
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.is_enabled = jz_clk_is_enabled_gating,
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};
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static struct divided_clk jz4740_clock_divided_clks[] = {
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{
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.clk = {
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.name = "lcd_pclk",
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.parent = &jz_clk_pll_half,
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.gate_bit = JZ4740_CLK_NOT_GATED,
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.ops = &jz_clk_divided_ops,
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},
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.reg = JZ_REG_CLOCK_LCD,
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.mask = JZ_CLOCK_LCD_DIV_MASK,
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},
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{
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.clk = {
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.name = "i2s",
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@ -656,11 +670,13 @@ static const struct clk_ops jz_clk_udc_ops = {
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.get_rate = jz_clk_udc_get_rate,
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.enable = jz_clk_udc_enable,
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.disable = jz_clk_udc_disable,
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.is_enabled = jz_clk_udc_is_enabled,
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};
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static const struct clk_ops jz_clk_simple_ops = {
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.enable = jz_clk_enable_gating,
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.disable = jz_clk_disable_gating,
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.is_enabled = jz_clk_is_enabled_gating,
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};
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static struct clk jz4740_clock_simple_clks[] = {
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@ -732,6 +748,14 @@ void clk_disable(struct clk *clk)
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}
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EXPORT_SYMBOL_GPL(clk_disable);
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int clk_is_enabled(struct clk *clk)
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{
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if (clk->ops->is_enabled)
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return clk->ops->is_enabled(clk);
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return 1;
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}
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unsigned long clk_get_rate(struct clk *clk)
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{
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if (clk->ops->get_rate)
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@ -771,6 +795,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
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ret = clk->ops->set_parent(clk, parent);
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clk_enable(clk);
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jz4740_clock_debugfs_update_parent(clk);
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return ret;
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}
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EXPORT_SYMBOL_GPL(clk_set_parent);
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@ -792,27 +818,29 @@ void clk_put(struct clk *clk)
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}
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EXPORT_SYMBOL_GPL(clk_put);
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inline static void clk_add(struct clk *clk)
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{
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list_add_tail(&clk->list, &jz_clocks);
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list_add_tail(&clk->list, &jz_clocks);
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jz4740_clock_debugfs_add_clk(clk);
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}
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static void clk_register_clks(void)
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{
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size_t i;
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clk_add(&jz_clk_ext.clk);
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clk_add(&jz_clk_pll);
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clk_add(&jz_clk_pll_half);
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clk_add(&jz_clk_cpu.clk);
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clk_add(&jz_clk_high_speed_peripheral.clk);
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clk_add(&jz_clk_low_speed_peripheral.clk);
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clk_add(&jz_clk_ko);
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clk_add(&jz_clk_ld);
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clk_add(&jz_clk_lp.clk);
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clk_add(&jz_clk_cim_mclk);
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clk_add(&jz_clk_cim_pclk.clk);
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clk_add(&jz_clk_rtc.clk);
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clk_add(&jz_clk_ext.clk);
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clk_add(&jz_clk_pll);
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clk_add(&jz_clk_pll_half);
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clk_add(&jz_clk_cpu.clk);
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clk_add(&jz_clk_high_speed_peripheral.clk);
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clk_add(&jz_clk_low_speed_peripheral.clk);
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clk_add(&jz_clk_ko);
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clk_add(&jz_clk_ld);
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clk_add(&jz_clk_cim_mclk);
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clk_add(&jz_clk_cim_pclk.clk);
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clk_add(&jz_clk_rtc.clk);
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for (i = 0; i < ARRAY_SIZE(jz4740_clock_divided_clks); ++i)
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clk_add(&jz4740_clock_divided_clks[i].clk);
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@ -870,8 +898,11 @@ int jz_init_clocks(unsigned long ext_rate)
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if (val & JZ_CLOCK_CTRL_UDC_SRC_PLL)
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jz4740_clock_simple_clks[0].parent = &jz_clk_pll_half;
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jz4740_clock_debugfs_init();
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clk_register_clks();
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return 0;
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}
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EXPORT_SYMBOL_GPL(jz_init_clocks);
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|
62
target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.h
Normal file
62
target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.h
Normal file
@ -0,0 +1,62 @@
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/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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* JZ4740 SoC clock support
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
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* Free Software Foundation; either version 2 of the License, or (at your
|
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* option) any later version.
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*
|
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* You should have received a copy of the GNU General Public License along
|
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* with this program; if not, write to the Free Software Foundation, Inc.,
|
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __JZ4740_CLOCK_H__
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#define __JZ4740_CLOCK_H__
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|
||||
struct clk_ops {
|
||||
unsigned long (*get_rate)(struct clk* clk);
|
||||
unsigned long (*round_rate)(struct clk *clk, unsigned long rate);
|
||||
int (*set_rate)(struct clk* clk, unsigned long rate);
|
||||
int (*enable)(struct clk* clk);
|
||||
int (*disable)(struct clk* clk);
|
||||
int (*is_enabled)(struct clk* clk);
|
||||
|
||||
int (*set_parent)(struct clk* clk, struct clk *parent);
|
||||
|
||||
};
|
||||
|
||||
struct clk {
|
||||
const char *name;
|
||||
struct clk* parent;
|
||||
|
||||
uint32_t gate_bit;
|
||||
|
||||
const struct clk_ops *ops;
|
||||
|
||||
struct list_head list;
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
struct dentry *debugfs_entry;
|
||||
struct dentry *debugfs_parent_entry;
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
#define JZ4740_CLK_NOT_GATED ((uint32_t)-1)
|
||||
|
||||
int clk_is_enabled(struct clk *clk);
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
void jz4740_clock_debugfs_init(void);
|
||||
void jz4740_clock_debugfs_add_clk(struct clk *clk);
|
||||
void jz4740_clock_debugfs_update_parent(struct clk *clk);
|
||||
#else
|
||||
static inline void jz4740_clock_debugfs_init(void) {};
|
||||
static inline void jz4740_clock_debugfs_add_clk(struct clk *clk) {};
|
||||
static inline void jz4740_clock_debugfs_update_parent(struct clk *clk) {};
|
||||
#endif
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user