realtek: enable CRC offloading
Enables CRC calculation offloading on RTL8380/8390/9300. Tested on Zyxel XGS1210-10 (RTL9302)/GS1900-48 (RTL8390)/GS1900-10HP (RTL8382) On the Zyxel GS1900-10HP, an increase of 5% in iperf3 send throughput and 11% in receive throughput is seen. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This commit is contained in:
Birger Koblitz
Petr Štetiar
parent
3bae740311
commit
9e8d62e421
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@ -234,19 +234,21 @@ struct dsa_tag {
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u16 port;
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u8 l2_offloaded;
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u8 prio;
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bool crc_error;
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};
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bool rtl838x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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{
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t->reason = h->cpu_tag[3] & 0xf;
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if (t->reason != 15)
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pr_debug("Reason: %d\n", t->reason);
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t->queue = (h->cpu_tag[0] & 0xe0) >> 5;
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t->port = h->cpu_tag[1] & 0x1f;
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t->crc_error = t->reason == 13;
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pr_debug("Reason: %d\n", t->reason);
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if (t->reason != 4) // NIC_RX_REASON_SPECIAL_TRAP
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t->l2_offloaded = 1;
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else
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t->l2_offloaded = 0;
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t->port = h->cpu_tag[1] & 0x1f;
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return t->l2_offloaded;
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}
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@ -254,15 +256,31 @@ bool rtl838x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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bool rtl839x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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{
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t->reason = h->cpu_tag[4] & 0x1f;
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if (t->reason != 31)
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t->queue = (h->cpu_tag[3] & 0xe000) >> 13;
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t->port = h->cpu_tag[1] & 0x3f;
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t->crc_error = h->cpu_tag[3] & BIT(2);
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pr_debug("Reason: %d\n", t->reason);
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t->queue = (h->cpu_tag[3] & 0xe000) >> 13;
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if ((t->reason != 7) && (t->reason != 8)) // NIC_RX_REASON_RMA_USR
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t->l2_offloaded = 1;
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else
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t->l2_offloaded = 0;
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t->port = h->cpu_tag[1] & 0x3f;
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return t->l2_offloaded;
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}
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bool rtl930x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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{
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t->reason = h->cpu_tag[7] & 0x3f;
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t->queue = (h->cpu_tag[2] >> 11) & 0x1f;
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t->port = (h->cpu_tag[0] >> 8) & 0x1f;
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t->crc_error = h->cpu_tag[1] & BIT(6);
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pr_debug("Reason %d, port %d, queue %d\n", t->reason, t->port, t->queue);
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if (t->reason >= 19 && t->reason <= 27)
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t->l2_offloaded = 0;
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else
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t->l2_offloaded = 1;
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return t->l2_offloaded;
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}
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@ -270,24 +288,19 @@ bool rtl839x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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bool rtl931x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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{
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t->reason = h->cpu_tag[7] & 0x3f;
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pr_debug("Reason %d\n", t->reason);
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t->queue = (h->cpu_tag[2] >> 11) & 0x1f;
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t->port = (h->cpu_tag[0] >> 8) & 0x3f;
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t->crc_error = h->cpu_tag[1] & BIT(6);
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pr_debug("Reason %d, port %d, queue %d\n", t->reason, t->port, t->queue);
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if (t->reason >= 19 && t->reason <= 27)
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t->l2_offloaded = 0;
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else
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t->l2_offloaded = 1;
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t->port = (h->cpu_tag[0] >> 8) & 0x3f;
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return t->l2_offloaded;
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}
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bool rtl930x_decode_tag(struct p_hdr *h, struct dsa_tag *t)
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{
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rtl931x_decode_tag(h, t);
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t->port &= 0x1f;
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return t->l2_offloaded;
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}
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/*
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* Discard the RX ring-buffers, called as part of the net-ISR
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* when the buffer runs over
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@ -731,8 +744,9 @@ static void rtl838x_hw_en_rxtx(struct rtl838x_eth_priv *priv)
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* | MEDIA_SEL
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*/
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sw_w32(0x6192F, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4);
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/* allow CRC errors on CPU-port */
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sw_w32_mask(0, 0x8, priv->r->mac_port_ctrl(priv->cpu_port));
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/* Enable CRC checks on CPU-port */
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sw_w32_mask(0, BIT(3), priv->r->mac_port_ctrl(priv->cpu_port));
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}
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static void rtl839x_hw_en_rxtx(struct rtl838x_eth_priv *priv)
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@ -746,8 +760,8 @@ static void rtl839x_hw_en_rxtx(struct rtl838x_eth_priv *priv)
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/* Enable DMA */
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sw_w32_mask(0, RX_EN | TX_EN, priv->r->dma_if_ctrl);
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/* Restart TX/RX to CPU port */
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sw_w32_mask(0x0, 0x3, priv->r->mac_port_ctrl(priv->cpu_port));
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/* Restart TX/RX to CPU port, enable CRC checking */
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sw_w32_mask(0x0, 0x3 | BIT(3), priv->r->mac_port_ctrl(priv->cpu_port));
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/* CPU port joins Lookup Miss Flooding Portmask */
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// TODO: The code below should also work for the RTL838x
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@ -784,8 +798,8 @@ static void rtl93xx_hw_en_rxtx(struct rtl838x_eth_priv *priv)
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/* Enable DMA */
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sw_w32_mask(0, RX_EN_93XX | TX_EN_93XX, priv->r->dma_if_ctrl);
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/* Restart TX/RX to CPU port */
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sw_w32_mask(0x0, 0x3, priv->r->mac_port_ctrl(priv->cpu_port));
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/* Restart TX/RX to CPU port, enable CRC checking */
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sw_w32_mask(0x0, 0x3 | BIT(4), priv->r->mac_port_ctrl(priv->cpu_port));
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sw_w32_mask(0, BIT(priv->cpu_port), RTL930X_L2_UNKN_UC_FLD_PMSK);
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sw_w32(0x217, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4);
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@ -1115,15 +1129,20 @@ static int rtl838x_eth_tx(struct sk_buff *skb, struct net_device *dev)
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if (netdev_uses_dsa(dev) && skb->data[len-4] == 0x80 && skb->data[len-3] > 0
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&& skb->data[len-3] < 28 && skb->data[len-2] == 0x10
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&& skb->data[len-1] == 0x00) {
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/* Reuse tag space for CRC */
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/* Reuse tag space for CRC if possible */
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dest_port = skb->data[len-3];
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len -= 4;
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}
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if (len < ETH_ZLEN)
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len = ETH_ZLEN;
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/* ASIC expects that packet includes CRC, so we extend by 4 bytes */
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len += 4;
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len += 4; // Add space for CRC
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// On RTL8380 SoCs, the packet needs extra padding
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if (priv->family_id == RTL8380_FAMILY_ID) {
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if (len < ETH_ZLEN)
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len = ETH_ZLEN; // SoC not automatically padding to ETH_ZLEN
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else
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len += 4;
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}
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if (skb_padto(skb, len)) {
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ret = NETDEV_TX_OK;
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@ -1280,6 +1299,12 @@ static int rtl838x_hw_receive(struct net_device *dev, int r, int budget)
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tag.queue, len, tag.reason, tag.port);
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skb->protocol = eth_type_trans(skb, dev);
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if (dev->features & NETIF_F_RXCSUM) {
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if (tag.crc_error)
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skb_checksum_none_assert(skb);
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else
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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}
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dev->stats.rx_packets++;
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dev->stats.rx_bytes += len;
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@ -1837,6 +1862,40 @@ static int rtl838x_mdio_remove(struct rtl838x_eth_priv *priv)
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return 0;
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}
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static netdev_features_t rtl838x_fix_features(struct net_device *dev,
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netdev_features_t features)
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{
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return features;
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}
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static int rtl83xx_set_features(struct net_device *dev, netdev_features_t features)
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{
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struct rtl838x_eth_priv *priv = netdev_priv(dev);
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if ((features ^ dev->features) & NETIF_F_RXCSUM) {
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if (!(features & NETIF_F_RXCSUM))
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sw_w32_mask(BIT(3), 0, priv->r->mac_port_ctrl(priv->cpu_port));
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else
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sw_w32_mask(0, BIT(4), priv->r->mac_port_ctrl(priv->cpu_port));
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}
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return 0;
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}
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static int rtl93xx_set_features(struct net_device *dev, netdev_features_t features)
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{
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struct rtl838x_eth_priv *priv = netdev_priv(dev);
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if ((features ^ dev->features) & NETIF_F_RXCSUM) {
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if (!(features & NETIF_F_RXCSUM))
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sw_w32_mask(BIT(4), 0, priv->r->mac_port_ctrl(priv->cpu_port));
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else
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sw_w32_mask(0, BIT(4), priv->r->mac_port_ctrl(priv->cpu_port));
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}
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return 0;
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}
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static const struct net_device_ops rtl838x_eth_netdev_ops = {
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.ndo_open = rtl838x_eth_open,
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.ndo_stop = rtl838x_eth_stop,
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@ -1846,6 +1905,8 @@ static const struct net_device_ops rtl838x_eth_netdev_ops = {
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.ndo_validate_addr = eth_validate_addr,
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.ndo_set_rx_mode = rtl838x_eth_set_multicast_list,
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.ndo_tx_timeout = rtl838x_eth_tx_timeout,
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.ndo_set_features = rtl83xx_set_features,
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.ndo_fix_features = rtl838x_fix_features,
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};
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static const struct net_device_ops rtl839x_eth_netdev_ops = {
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@ -1857,6 +1918,8 @@ static const struct net_device_ops rtl839x_eth_netdev_ops = {
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.ndo_validate_addr = eth_validate_addr,
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.ndo_set_rx_mode = rtl839x_eth_set_multicast_list,
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.ndo_tx_timeout = rtl838x_eth_tx_timeout,
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.ndo_set_features = rtl83xx_set_features,
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.ndo_fix_features = rtl838x_fix_features,
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};
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static const struct net_device_ops rtl930x_eth_netdev_ops = {
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@ -1868,6 +1931,8 @@ static const struct net_device_ops rtl930x_eth_netdev_ops = {
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.ndo_validate_addr = eth_validate_addr,
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.ndo_set_rx_mode = rtl930x_eth_set_multicast_list,
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.ndo_tx_timeout = rtl838x_eth_tx_timeout,
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.ndo_set_features = rtl93xx_set_features,
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.ndo_fix_features = rtl838x_fix_features,
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};
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static const struct net_device_ops rtl931x_eth_netdev_ops = {
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@ -1879,6 +1944,8 @@ static const struct net_device_ops rtl931x_eth_netdev_ops = {
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.ndo_validate_addr = eth_validate_addr,
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.ndo_set_rx_mode = rtl931x_eth_set_multicast_list,
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.ndo_tx_timeout = rtl838x_eth_tx_timeout,
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.ndo_set_features = rtl93xx_set_features,
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.ndo_fix_features = rtl838x_fix_features,
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};
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static const struct phylink_mac_ops rtl838x_phylink_ops = {
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@ -1975,6 +2042,8 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
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dev->ethtool_ops = &rtl838x_ethtool_ops;
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dev->min_mtu = ETH_ZLEN;
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dev->max_mtu = 1536;
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dev->features = NETIF_F_RXCSUM | NETIF_F_HW_CSUM;
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dev->hw_features = NETIF_F_RXCSUM;
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priv->id = soc_info.id;
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priv->family_id = soc_info.family;
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