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ipq806x: remove merged ipq4019 patch
The patch 0022-dts-ipq4019-support-ARMv7-PMU.patch was merged into 4.8-rc1. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> [refresh patches] Signed-off-by: Mathias Kresin <dev@kresin.me>
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@ -1,28 +0,0 @@
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From 47f00399b195e0987c67006b329587bef0692bf4 Mon Sep 17 00:00:00 2001
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From: Thomas Pedersen <twp@codeaurora.org>
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Date: Wed, 4 May 2016 12:25:41 -0700
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Subject: [PATCH 22/69] dts: ipq4019: support ARMv7 PMU
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Add support for cortex-a7-pmu present on ipq4019 SoCs.
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Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
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Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
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---
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -108,6 +108,12 @@
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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+ pmu {
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+ compatible = "arm,cortex-a7-pmu";
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+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
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+ IRQ_TYPE_LEVEL_HIGH)>;
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+ };
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+
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clocks {
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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@ -67,7 +67,7 @@ Changes:
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qcom,acc = <&acc3>;
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qcom,saw = <&saw3>;
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reg = <0x3>;
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@@ -218,22 +228,22 @@
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@@ -212,22 +222,22 @@
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};
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acc0: clock-controller@b088000 {
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@ -94,7 +94,7 @@ Changes:
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reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
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};
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@@ -261,6 +271,12 @@
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@@ -255,6 +265,12 @@
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regulator;
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};
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@ -51,7 +51,7 @@ Changes:
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};
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -313,5 +313,76 @@
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@@ -307,5 +307,76 @@
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compatible = "qcom,pshold";
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reg = <0x4ab000 0x4>;
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};
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@ -13,7 +13,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -384,5 +384,89 @@
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@@ -378,5 +378,89 @@
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dr_mode = "host";
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};
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};
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@ -13,7 +13,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -277,6 +277,13 @@
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@@ -271,6 +271,13 @@
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regulator;
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};
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@ -15,7 +15,7 @@ so the info might change.
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -321,6 +321,34 @@
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@@ -315,6 +315,34 @@
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reg = <0x4ab000 0x4>;
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};
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@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -349,6 +349,29 @@
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@@ -343,6 +343,29 @@
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};
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};
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@ -25,7 +25,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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};
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cpus {
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@@ -372,6 +374,64 @@
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@@ -366,6 +368,64 @@
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status = "disabled";
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};
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@ -120,7 +120,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
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};
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -586,5 +586,43 @@
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@@ -580,5 +580,43 @@
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"legacy";
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status = "disabled";
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};
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@ -33,7 +33,7 @@ Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
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pins = "gpio60", "gpio61";
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -155,7 +155,7 @@
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@@ -149,7 +149,7 @@
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reg = <0x1800000 0x60000>;
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};
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@ -54,7 +54,7 @@ Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
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mux {
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -132,6 +132,21 @@
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@@ -126,6 +126,21 @@
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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