realtek: refresh patches for Kernel 5.10

This patch refresh all patches in patches-5.10/ to adjust for Kernel
5.10.

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
This commit is contained in:
INAGAKI Hiroshi 2021-05-05 14:02:49 +09:00 committed by Adrian Schmutzler
parent 46945e02d3
commit 95f089dafe
10 changed files with 44 additions and 51 deletions

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@ -1,16 +1,16 @@
--- a/arch/mips/Kbuild.platforms --- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms +++ b/arch/mips/Kbuild.platforms
@@ -27,6 +27,7 @@ platforms += pistachio @@ -23,6 +23,7 @@ platform-$(CONFIG_PIC32MZDA) += pic32/
platforms += pmcs-msp71xx platform-$(CONFIG_MACH_PISTACHIO) += pistachio/
platforms += pnx833x platform-$(CONFIG_RALINK) += ralink/
platforms += ralink platform-$(CONFIG_MIKROTIK_RB532) += rb532/
+platforms += rtl838x +platform-$(CONFIG_RTL838X) += rtl838x/
platforms += rb532 platform-$(CONFIG_SGI_IP22) += sgi-ip22/
platforms += sgi-ip22 platform-$(CONFIG_SGI_IP27) += sgi-ip27/
platforms += sgi-ip27 platform-$(CONFIG_SGI_IP28) += sgi-ip22/
--- a/arch/mips/Kconfig --- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig +++ b/arch/mips/Kconfig
@@ -631,6 +631,26 @@ config RALINK @@ -627,6 +627,26 @@ config RALINK
select ARCH_HAS_RESET_CONTROLLER select ARCH_HAS_RESET_CONTROLLER
select RESET_CONTROLLER select RESET_CONTROLLER
@ -36,4 +36,4 @@
+ +
config SGI_IP22 config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)" bool "SGI IP22 (Indy/Indigo2)"
select FW_ARC select ARC_MEMORY

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@ -1,6 +1,6 @@
--- a/drivers/gpio/Kconfig --- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig
@@ -441,6 +441,12 @@ config GPIO_REG @@ -508,6 +508,12 @@ config GPIO_REG
A 32-bit single register GPIO fixed in/out implementation. This A 32-bit single register GPIO fixed in/out implementation. This
can be used to represent any register as a set of GPIO signals. can be used to represent any register as a set of GPIO signals.
@ -15,9 +15,9 @@
depends on MFD_SYSCON depends on MFD_SYSCON
--- a/drivers/gpio/Makefile --- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile
@@ -117,6 +117,7 @@ obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t @@ -126,6 +126,7 @@ obj-$(CONFIG_GPIO_RDA) += gpio-rda.o
obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o
obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
obj-$(CONFIG_GPIO_REALTEK_OTTO) += gpio-realtek-otto.o
obj-$(CONFIG_GPIO_REG) += gpio-reg.o obj-$(CONFIG_GPIO_REG) += gpio-reg.o
+obj-$(CONFIG_GPIO_RTL8231) += gpio-rtl8231.o +obj-$(CONFIG_GPIO_RTL8231) += gpio-rtl8231.o
obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o

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@ -1,6 +1,6 @@
--- a/drivers/clocksource/Kconfig --- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig
@@ -127,6 +127,15 @@ config RDA_TIMER @@ -126,6 +126,15 @@ config RDA_TIMER
help help
Enables the support for the RDA Micro timer driver. Enables the support for the RDA Micro timer driver.
@ -16,15 +16,9 @@
config SUN4I_TIMER config SUN4I_TIMER
bool "Sun4i timer driver" if COMPILE_TEST bool "Sun4i timer driver" if COMPILE_TEST
depends on HAS_IOMEM depends on HAS_IOMEM
@@ -696,5 +705,4 @@ config INGENIC_TIMER
select IRQ_DOMAIN
help
Support for the timer/counter unit of the Ingenic JZ SoCs.
-
endmenu
--- a/drivers/clocksource/Makefile --- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MILBEAUT_TIMER) += timer-mi @@ -63,6 +63,7 @@ obj-$(CONFIG_MILBEAUT_TIMER) += timer-mi
obj-$(CONFIG_SPRD_TIMER) += timer-sprd.o obj-$(CONFIG_SPRD_TIMER) += timer-sprd.o
obj-$(CONFIG_NPCM7XX_TIMER) += timer-npcm7xx.o obj-$(CONFIG_NPCM7XX_TIMER) += timer-npcm7xx.o
obj-$(CONFIG_RDA_TIMER) += timer-rda.o obj-$(CONFIG_RDA_TIMER) += timer-rda.o

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@ -1,6 +1,6 @@
--- a/drivers/net/dsa/Kconfig --- a/drivers/net/dsa/Kconfig
+++ b/drivers/net/dsa/Kconfig +++ b/drivers/net/dsa/Kconfig
@@ -63,6 +63,8 @@ config NET_DSA_QCA8K @@ -67,6 +67,8 @@ config NET_DSA_QCA8K
This enables support for the Qualcomm Atheros QCA8K Ethernet This enables support for the Qualcomm Atheros QCA8K Ethernet
switch chips. switch chips.
@ -11,8 +11,8 @@
depends on NET_DSA depends on NET_DSA
--- a/drivers/net/dsa/Makefile --- a/drivers/net/dsa/Makefile
+++ b/drivers/net/dsa/Makefile +++ b/drivers/net/dsa/Makefile
@@ -21,3 +21,4 @@ obj-y += b53/ @@ -23,3 +23,4 @@ obj-y += mv88e6xxx/
obj-y += microchip/ obj-y += ocelot/
obj-y += mv88e6xxx/ obj-y += qca/
obj-y += sja1105/ obj-y += sja1105/
+obj-y += rtl83xx/ +obj-y += rtl83xx/

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@ -1,8 +1,8 @@
--- a/net/dsa/tag_trailer.c --- a/net/dsa/tag_trailer.c
+++ b/net/dsa/tag_trailer.c +++ b/net/dsa/tag_trailer.c
@@ -44,7 +44,12 @@ static struct sk_buff *trailer_xmit(stru @@ -17,7 +17,12 @@ static struct sk_buff *trailer_xmit(stru
trailer = skb_put(nskb, 4); trailer = skb_put(skb, 4);
trailer[0] = 0x80; trailer[0] = 0x80;
+ +
+#ifdef CONFIG_NET_DSA_RTL83XX +#ifdef CONFIG_NET_DSA_RTL83XX
@ -13,7 +13,7 @@
trailer[2] = 0x10; trailer[2] = 0x10;
trailer[3] = 0x00; trailer[3] = 0x00;
@@ -61,12 +66,23 @@ static struct sk_buff *trailer_rcv(struc @@ -34,12 +39,23 @@ static struct sk_buff *trailer_rcv(struc
return NULL; return NULL;
trailer = skb_tail_pointer(skb) - 4; trailer = skb_tail_pointer(skb) - 4;

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@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/Kconfig --- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig +++ b/drivers/net/ethernet/Kconfig
@@ -163,6 +163,13 @@ source "drivers/net/ethernet/rdc/Kconfig @@ -162,6 +162,13 @@ source "drivers/net/ethernet/rdc/Kconfig
source "drivers/net/ethernet/realtek/Kconfig" source "drivers/net/ethernet/realtek/Kconfig"
source "drivers/net/ethernet/renesas/Kconfig" source "drivers/net/ethernet/renesas/Kconfig"
source "drivers/net/ethernet/rocker/Kconfig" source "drivers/net/ethernet/rocker/Kconfig"
@ -16,7 +16,7 @@
source "drivers/net/ethernet/sfc/Kconfig" source "drivers/net/ethernet/sfc/Kconfig"
--- a/drivers/net/ethernet/Makefile --- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile +++ b/drivers/net/ethernet/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_NET_VENDOR_REALTEK) += real @@ -75,6 +75,7 @@ obj-$(CONFIG_NET_VENDOR_REALTEK) += real
obj-$(CONFIG_NET_VENDOR_RENESAS) += renesas/ obj-$(CONFIG_NET_VENDOR_RENESAS) += renesas/
obj-$(CONFIG_NET_VENDOR_RDC) += rdc/ obj-$(CONFIG_NET_VENDOR_RDC) += rdc/
obj-$(CONFIG_NET_VENDOR_ROCKER) += rocker/ obj-$(CONFIG_NET_VENDOR_ROCKER) += rocker/

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@ -1,9 +1,9 @@
--- a/include/linux/phy.h --- a/include/linux/phy.h
+++ b/include/linux/phy.h +++ b/include/linux/phy.h
@@ -645,6 +645,10 @@ struct phy_driver { @@ -881,6 +881,10 @@ struct phy_driver {
struct ethtool_tunable *tuna, int (*get_sqi)(struct phy_device *dev);
const void *data); /** @get_sqi_max: Get the maximum signal quality indication */
int (*set_loopback)(struct phy_device *dev, bool enable); int (*get_sqi_max)(struct phy_device *dev);
+ int (*get_port)(struct phy_device *dev); + int (*get_port)(struct phy_device *dev);
+ int (*set_port)(struct phy_device *dev, int port); + int (*set_port)(struct phy_device *dev, int port);
+ int (*get_eee)(struct phy_device *dev, struct ethtool_eee *e); + int (*get_eee)(struct phy_device *dev, struct ethtool_eee *e);

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@ -1,18 +1,18 @@
--- a/drivers/net/phy/phylink.c --- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c
@@ -1242,6 +1242,11 @@ int phylink_ethtool_ksettings_set(struct @@ -1425,6 +1425,11 @@ int phylink_ethtool_ksettings_set(struct
* the presence of a PHY, this should not be changed as that
/* If we have a PHY, configure the phy */ * should be determined from the media side advertisement.
if (pl->phydev) { */
+ if (pl->phydev->drv->get_port && pl->phydev->drv->set_port) { + if (pl->phydev->drv->get_port && pl->phydev->drv->set_port) {
+ if(pl->phydev->drv->get_port(pl->phydev) != kset->base.port) { + if(pl->phydev->drv->get_port(pl->phydev) != kset->base.port) {
+ pl->phydev->drv->set_port(pl->phydev, kset->base.port); + pl->phydev->drv->set_port(pl->phydev, kset->base.port);
+ } + }
+ } + }
ret = phy_ethtool_ksettings_set(pl->phydev, &our_kset); return phy_ethtool_ksettings_set(pl->phydev, kset);
if (ret) }
return ret;
@@ -1420,8 +1425,11 @@ int phylink_ethtool_get_eee(struct phyli @@ -1700,8 +1705,11 @@ int phylink_ethtool_get_eee(struct phyli
ASSERT_RTNL(); ASSERT_RTNL();
@ -25,7 +25,7 @@
return ret; return ret;
} }
@@ -1438,9 +1446,11 @@ int phylink_ethtool_set_eee(struct phyli @@ -1718,8 +1726,11 @@ int phylink_ethtool_set_eee(struct phyli
ASSERT_RTNL(); ASSERT_RTNL();
@ -34,8 +34,7 @@
+ if (pl->phydev->drv->set_eee) + if (pl->phydev->drv->set_eee)
+ return pl->phydev->drv->set_eee(pl->phydev, eee); + return pl->phydev->drv->set_eee(pl->phydev, eee);
ret = phy_ethtool_set_eee(pl->phydev, eee); ret = phy_ethtool_set_eee(pl->phydev, eee);
-
+ } + }
return ret; return ret;
} }
EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);

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@ -1,7 +1,7 @@
--- a/drivers/net/phy/Kconfig --- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig
@@ -540,6 +540,12 @@ config REALTEK_PHY @@ -324,6 +324,12 @@ config REALTEK_PHY
---help--- help
Supports the Realtek 821x PHY. Supports the Realtek 821x PHY.
+config REALTEK_SOC_PHY +config REALTEK_SOC_PHY
@ -11,11 +11,11 @@
+ Supports the PHYs found in combination with Realtek Switch SoCs + Supports the PHYs found in combination with Realtek Switch SoCs
+ +
config RENESAS_PHY config RENESAS_PHY
tristate "Driver for Renesas PHYs" tristate "Renesas PHYs"
---help--- help
--- a/drivers/net/phy/Makefile --- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile
@@ -102,6 +102,7 @@ obj-$(CONFIG_NATIONAL_PHY) += national.o @@ -86,6 +86,7 @@ obj-$(CONFIG_NATIONAL_PHY) += national.o
obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o
obj-$(CONFIG_QSEMI_PHY) += qsemi.o obj-$(CONFIG_QSEMI_PHY) += qsemi.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o obj-$(CONFIG_REALTEK_PHY) += realtek.o

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@ -1,6 +1,6 @@
--- a/include/linux/phy.h --- a/include/linux/phy.h
+++ b/include/linux/phy.h +++ b/include/linux/phy.h
@@ -188,7 +188,7 @@ static inline const char *phy_modes(phy_ @@ -226,7 +226,7 @@ static inline const char *phy_modes(phy_
#define PHY_INIT_TIMEOUT 100000 #define PHY_INIT_TIMEOUT 100000
#define PHY_FORCE_TIMEOUT 10 #define PHY_FORCE_TIMEOUT 10