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git://git.openwrt.org/openwrt/openwrt.git
synced 2024-12-12 09:54:53 +00:00
add even more workarounds for bcm4710, remove -fno-delayed-branch from kernel cflags -- not needed anymore
SVN-Revision: 1132
This commit is contained in:
parent
5734340192
commit
8ea1a39bc0
@ -187,7 +187,7 @@ $(LINUX_DIR)/.depend_done: $(LINUX_DIR)/.configured
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touch $(LINUX_DIR)/.depend_done
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$(LINUX_DIR)/$(LINUX_BINLOC): $(LINUX_DIR)/.depend_done
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$(MAKE) -C $(LINUX_DIR) ARCH=$(LINUX_KARCH) PATH=$(TARGET_PATH) CFLAGS_KERNEL="-fno-delayed-branch " $(LINUX_FORMAT)
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$(MAKE) -C $(LINUX_DIR) ARCH=$(LINUX_KARCH) PATH=$(TARGET_PATH) $(LINUX_FORMAT)
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$(LINUX_KERNEL): $(LINUX_DIR)/$(LINUX_BINLOC)
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cp -fa $< $@
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@ -198,7 +198,7 @@ $(LINUX_IMAGE): $(LINUX_KERNEL)
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$(LINUX_DIR)/.modules_done: $(LINUX_KERNEL) $(LINUX_IMAGE)
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rm -rf $(LINUX_BUILD_DIR)/modules
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$(MAKE) -C $(LINUX_DIR) ARCH=$(LINUX_KARCH) PATH=$(TARGET_PATH) CFLAGS_KERNEL="-fno-delayed-branch " modules
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$(MAKE) -C $(LINUX_DIR) ARCH=$(LINUX_KARCH) PATH=$(TARGET_PATH) modules
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$(MAKE) -C $(LINUX_DIR) DEPMOD=true INSTALL_MOD_PATH=$(LINUX_BUILD_DIR)/modules modules_install
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touch $(LINUX_DIR)/.modules_done
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@ -106,3 +106,17 @@ diff -urN linux.old/arch/mips/mm/tlbex-r4k.S linux.dev/arch/mips/mm/tlbex-r4k.S
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GET_PGD(k0, k1) # get pgd pointer
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mfc0 k0, CP0_BADVADDR # Get faulting address
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srl k0, k0, _PGDIR_SHIFT # get pgd only bits
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diff -urN linux.old/arch/mips/kernel/entry.S linux.dev/arch/mips/kernel/entry.S
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--- linux.old/arch/mips/kernel/entry.S 2003-08-25 13:44:40.000000000 +0200
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+++ linux.dev/arch/mips/kernel/entry.S 2005-06-01 20:10:36.000000000 +0200
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@@ -100,6 +100,10 @@
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* and R4400 SC and MC versions.
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*/
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NESTED(except_vec3_generic, 0, sp)
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+#ifdef CONFIG_BCM4710
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+ nop
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+ nop
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+#endif
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#if R5432_CP0_INTERRUPT_WAR
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mfc0 k0, CP0_INDEX
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#endif
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@ -1,6 +1,6 @@
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diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
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--- linux.old/arch/mips/mm/c-r4k.c 2005-05-28 17:42:06.000000000 +0200
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+++ linux.dev/arch/mips/mm/c-r4k.c 2005-05-29 18:26:34.000000000 +0200
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--- linux.old/arch/mips/mm/c-r4k.c 2005-06-01 18:42:44.000000000 +0200
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+++ linux.dev/arch/mips/mm/c-r4k.c 2005-06-01 18:49:07.000000000 +0200
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@@ -14,6 +14,12 @@
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#include <linux/mm.h>
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#include <linux/bitops.h>
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@ -26,7 +26,29 @@ diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
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while (1) {
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/* Hit_Writeback_Inv_D */
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protected_writeback_dcache_line(addr);
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@@ -509,6 +520,10 @@
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@@ -405,6 +416,10 @@
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else {
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addr = start & ~(ic_lsize - 1);
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aend = (end - 1) & ~(ic_lsize - 1);
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+#ifdef CONFIG_BCM4710
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+ BCM4710_FILL_TLB(addr);
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+ BCM4710_FILL_TLB(aend);
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+#endif
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while (1) {
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/* Hit_Invalidate_I */
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protected_flush_icache_line(addr);
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@@ -487,6 +502,10 @@
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a = addr & ~(sc_lsize - 1);
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end = (addr + size - 1) & ~(sc_lsize - 1);
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+#ifdef CONFIG_BCM4710
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+ BCM4710_FILL_TLB(a);
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+ BCM4710_FILL_TLB(end);
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+#endif
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while (1) {
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flush_scache_line(a); /* Hit_Writeback_Inv_SD */
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if (a == end)
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@@ -509,6 +528,10 @@
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R4600_HIT_CACHEOP_WAR_IMPL;
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a = addr & ~(dc_lsize - 1);
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end = (addr + size - 1) & ~(dc_lsize - 1);
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@ -37,7 +59,18 @@ diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
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while (1) {
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flush_dcache_line(a); /* Hit_Writeback_Inv_D */
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if (a == end)
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@@ -576,6 +591,10 @@
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@@ -537,6 +560,10 @@
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a = addr & ~(sc_lsize - 1);
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end = (addr + size - 1) & ~(sc_lsize - 1);
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+#ifdef CONFIG_BCM4710
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+ BCM4710_FILL_TLB(a);
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+ BCM4710_FILL_TLB(end);
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+#endif
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while (1) {
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flush_scache_line(a); /* Hit_Writeback_Inv_SD */
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if (a == end)
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@@ -576,6 +603,10 @@
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unsigned long ic_lsize = current_cpu_data.icache.linesz;
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unsigned long dc_lsize = current_cpu_data.dcache.linesz;
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@ -49,8 +82,8 @@ diff -urN linux.old/arch/mips/mm/c-r4k.c linux.dev/arch/mips/mm/c-r4k.c
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protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
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protected_flush_icache_line(addr & ~(ic_lsize - 1));
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diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kcache.h
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--- linux.old/include/asm-mips/r4kcache.h 2005-05-28 17:42:06.000000000 +0200
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+++ linux.dev/include/asm-mips/r4kcache.h 2005-05-29 18:34:46.000000000 +0200
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--- linux.old/include/asm-mips/r4kcache.h 2005-06-01 18:42:43.000000000 +0200
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+++ linux.dev/include/asm-mips/r4kcache.h 2005-06-01 19:07:11.000000000 +0200
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@@ -15,6 +15,25 @@
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#include <asm/asm.h>
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#include <asm/cacheops.h>
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@ -86,7 +119,17 @@ diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kca
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static inline void flush_icache_line_indexed(unsigned long addr)
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{
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@@ -47,6 +68,10 @@
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@@ -32,6 +53,9 @@
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static inline void flush_dcache_line_indexed(unsigned long addr)
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{
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+#ifdef CONFIG_BCM4710
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+ BCM4710_DUMMY_RREG();
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+#endif
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cache_op(Index_Writeback_Inv_D, addr);
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}
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@@ -47,6 +71,10 @@
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static inline void flush_dcache_line(unsigned long addr)
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{
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@ -97,7 +140,55 @@ diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kca
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cache_op(Hit_Writeback_Inv_D, addr);
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}
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@@ -196,7 +221,13 @@
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@@ -91,6 +119,9 @@
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*/
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static inline void protected_writeback_dcache_line(unsigned long addr)
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{
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+#ifdef CONFIG_BCM4710
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+ BCM4710_DUMMY_RREG();
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+#endif
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__asm__ __volatile__(
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".set noreorder\n\t"
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".set mips3\n"
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@@ -148,8 +179,12 @@
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unsigned long ws, addr;
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for (ws = 0; ws < ws_end; ws += ws_inc)
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- for (addr = start; addr < end; addr += 0x200)
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+ for (addr = start; addr < end; addr += 0x200) {
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+#ifdef CONFIG_BCM4710
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+ BCM4710_DUMMY_RREG();
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+#endif
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cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
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+ }
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}
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static inline void blast_dcache16_page(unsigned long page)
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@@ -158,6 +193,9 @@
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unsigned long end = start + PAGE_SIZE;
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do {
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+#ifdef CONFIG_BCM4710
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+ BCM4710_DUMMY_RREG();
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+#endif
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cache16_unroll32(start,Hit_Writeback_Inv_D);
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start += 0x200;
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} while (start < end);
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@@ -173,8 +211,12 @@
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unsigned long ws, addr;
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for (ws = 0; ws < ws_end; ws += ws_inc)
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- for (addr = start; addr < end; addr += 0x200)
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+ for (addr = start; addr < end; addr += 0x200) {
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+#ifdef CONFIG_BCM4710
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+ BCM4710_DUMMY_RREG();
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+#endif
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cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
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+ }
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}
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static inline void blast_icache16(void)
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@@ -196,7 +238,13 @@
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unsigned long start = page;
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unsigned long end = start + PAGE_SIZE;
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@ -111,7 +202,7 @@ diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kca
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cache16_unroll32(start,Hit_Invalidate_I);
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start += 0x200;
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} while (start < end);
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@@ -291,8 +322,12 @@
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@@ -291,8 +339,12 @@
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unsigned long ws, addr;
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for (ws = 0; ws < ws_end; ws += ws_inc)
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@ -125,7 +216,7 @@ diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kca
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}
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static inline void blast_dcache32_page(unsigned long page)
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@@ -300,6 +335,9 @@
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@@ -300,7 +352,13 @@
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unsigned long start = page;
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unsigned long end = start + PAGE_SIZE;
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@ -133,9 +224,13 @@ diff -urN linux.old/include/asm-mips/r4kcache.h linux.dev/include/asm-mips/r4kca
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+ __asm__ __volatile__("nop;nop;nop;nop");
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+#endif
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do {
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+#ifdef CONFIG_BCM4710
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+ BCM4710_DUMMY_RREG();
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+#endif
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cache32_unroll32(start,Hit_Writeback_Inv_D);
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start += 0x400;
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@@ -339,6 +377,9 @@
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} while (start < end);
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@@ -339,6 +397,9 @@
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unsigned long start = page;
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unsigned long end = start + PAGE_SIZE;
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