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kernel: qca-ssdk: update 12.5 to 2024-06-13
There are some new commits, so refresh and update patches. Some build warnings have been fixed upstream too. Add backport target/linux/generic/backport-6.6/722-v6.10-dt-bindings-arm-qcom-ids-Add-SoC-ID-for-IPQ5321.patch. Removed upstream: [-] qca-ssdk/patches/101-hsl_phy-add-support-for-detection-PSGMII-PHY-mode.patch [-] qca-ssdk/patches/201-fix-compile-warnings.patch List of changes: 2024-04-16 -c451136b- qca-ssdk: strip MRPPE code 2024-06-05 -f455a820- [qca-ssdk]: fix enum-int-mismatch warnings 2024-05-31 -bbfc0fa9- Merge "[qca-ssdk]: update eee status of phydev" 2024-05-31 -adbe9dc5- Merge "[qca-ssdk]: support psgmii and uqsxgmii mode of kernel" 2024-05-31 -d06ca777- Merge "[qca-ssdk]: fix 5G issue with the AQR FW that use 5gbaser for 5G speed" 2024-05-31 -c6f539a5- Merge "qca-ssdk: support mrppe pktedit padding functions" 2024-04-29 -c321e2a9- qca-ssdk: support mrppe pktedit padding functions 2024-05-24 -ee6e201e- qca-ssdk: Fix the big endian compile error 2024-05-15 -8c116bb9- [qca-ssdk]: update eee status of phydev 2024-05-20 -f0341a2c- Merge "qca-ssdk: Enable igmp for PPE MINI profile" 2024-05-16 -44a0ce93- qca-ssdk: Enable igmp for PPE MINI profile 2024-05-15 -8b91bbf6- [qca-ssdk]: support psgmii and uqsxgmii mode of kernel 2024-05-14 -7eec1658- [qca-ssdk]: fix 5G issue with the AQR FW that use 5gbaser for 5G speed 2024-05-12 -b9f5ea0e- [qca-ssdk]: ethtool support, do not change wake-up timer when the requested timer is 0 2024-05-09 -5e2c15ed- Merge "[qca-ssdk]: remove check when mht clock enable" 2024-05-09 -a1563b90- Merge "[qca-ssdk] support new sku IPQ5321" 2024-04-23 -f04b7680- [qca-ssdk]: show unknown status when link down 2024-03-22 -33b91b30- [qca-ssdk]: remove check when mht clock enable 2024-04-29 -b6362f2b- Merge "qca-ssdk:fix bug in marina nptv6 iid cal" 2024-04-29 -097033ae- Merge "[qca-ssdk] support cypress uniphy0 connecting MHT switch port0" 2024-04-24 -d45560fd- qca-ssdk:fix bug in marina nptv6 iid cal 2024-04-24 -7d7a42af- qca-ssdk: enable policer counter on low memory profile 2024-04-18 -e36cf6ea- Merge "[qca-ssdk]: change portvlan egress mode initial value as untouched" 2024-04-18 -27817881- Merge "[qca-ssdk]: update the aqr phy supported ability" 2024-04-18 -5a3a693c- Merge "qca-ssdk:support marina nptv6" 2024-04-16 -129fe9b3- Merge "qca-ssdk: support tunnel fields and innner fields inverse" 2024-01-09 -fc8f6abd- qca-ssdk:support marina nptv6 Signed-off-by: Kristian Skramstad <kristian+github@83.no> Link: https://github.com/openwrt/openwrt/pull/15771 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Kristian Skramstad
Robert Marko
parent
ed6935613e
commit
87a45ea432
@ -1,13 +1,13 @@
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include $(TOPDIR)/rules.mk
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PKG_NAME:=qca-ssdk
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PKG_RELEASE:=2
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PKG_RELEASE:=3
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PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_DATE:=2024-04-17
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PKG_SOURCE_VERSION:=3d060f7ad70d087f6b0452abe79ab6d042e8cd53
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PKG_MIRROR_HASH:=6f5e390b294e699491584094f5d7eb941de6237ad8c5320191e9e306fbcd8eb5
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PKG_SOURCE_DATE:=2024-06-13
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PKG_SOURCE_VERSION:=c451136ba69d51d60f770365b6d6d60ff2801998
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PKG_MIRROR_HASH:=4c54f2d77b5abeb96bddceb4a9eb58aa2c8fb12b58d5d666196224a35ac107dc
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PKG_FLAGS:=nonshared
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PKG_BUILD_PARALLEL:=1
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@ -1,25 +0,0 @@
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From e3763fd77e41b2f2495672c6a5898d69892fbf9f Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Wed, 15 Nov 2023 00:57:41 +0100
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Subject: [PATCH] hsl_phy: add support for detection PSGMII PHY mode
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Add support for detection of PSGMII PHY mode to correctly detect qca807x
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PHY upstream driver.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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src/hsl/phy/hsl_phy.c | 3 +++
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1 file changed, 3 insertions(+)
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--- a/src/hsl/phy/hsl_phy.c
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+++ b/src/hsl/phy/hsl_phy.c
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@@ -1322,6 +1322,9 @@ hsl_port_phydev_interface_mode_status_ge
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case PHY_INTERFACE_MODE_10GKR:
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*interface_mode_status = PORT_10GBASE_R;
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break;
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+ case PHY_INTERFACE_MODE_PSGMII:
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+ *interface_mode_status = PHY_PSGMII_BASET;
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+ break;
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case PHY_INTERFACE_MODE_QSGMII:
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*interface_mode_status = PORT_QSGMII;
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break;
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@ -40,7 +40,7 @@
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kslib_c:
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--- a/make/linux_opt.mk
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+++ b/make/linux_opt.mk
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@@ -778,6 +778,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M
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@@ -782,6 +782,6 @@ LOCAL_CFLAGS += $(CPU_CFLAG) -D"KBUILD_M
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####################################################################
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# cflags for LNX Modules-Style Makefile
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####################################################################
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@ -1,31 +0,0 @@
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--- a/src/fal/fal_port_ctrl.c
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+++ b/src/fal/fal_port_ctrl.c
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@@ -2089,7 +2089,7 @@ fal_port_hibernate_get (a_uint32_t dev_i
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*/
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sw_error_t
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fal_port_cdt (a_uint32_t dev_id, fal_port_t port_id, a_uint32_t mdi_pair,
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- a_uint32_t * cable_status, a_uint32_t * cable_len)
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+ fal_cable_status_t * cable_status, a_uint32_t * cable_len)
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{
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sw_error_t rv;
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--- a/src/fal/fal_portvlan.c
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+++ b/src/fal/fal_portvlan.c
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@@ -2173,7 +2173,7 @@ fal_netisolate_get(a_uint32_t dev_id, a_
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* @return SW_OK or error code
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*/
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sw_error_t
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-fal_eg_trans_filter_bypass_en_set(a_uint32_t dev_id, a_bool_t enable)
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+fal_eg_trans_filter_bypass_en_set(a_uint32_t dev_id, a_uint32_t enable)
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{
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sw_error_t rv;
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@@ -2190,7 +2190,7 @@ fal_eg_trans_filter_bypass_en_set(a_uint
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* @return SW_OK or error code
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*/
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sw_error_t
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-fal_eg_trans_filter_bypass_en_get(a_uint32_t dev_id, a_bool_t* enable)
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+fal_eg_trans_filter_bypass_en_get(a_uint32_t dev_id, a_uint32_t* enable)
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{
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sw_error_t rv;
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@ -0,0 +1,28 @@
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From 27c42e925323b975a64429e313b0cf5c0c02a411 Mon Sep 17 00:00:00 2001
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From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
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Date: Mon, 25 Mar 2024 21:19:48 +0530
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Subject: dt-bindings: arm: qcom,ids: Add SoC ID for IPQ5321
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Add the ID for the Qualcomm IPQ5321 SoC.
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Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
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Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
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Link: https://lore.kernel.org/r/20240325-ipq5321-sku-support-v2-1-f30ce244732f@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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include/dt-bindings/arm/qcom,ids.h | 1 +
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1 file changed, 1 insertion(+)
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(limited to 'include/dt-bindings/arm/qcom,ids.h')
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--- a/include/dt-bindings/arm/qcom,ids.h
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+++ b/include/dt-bindings/arm/qcom,ids.h
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@@ -260,6 +260,7 @@
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#define QCOM_ID_IPQ5312 594
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#define QCOM_ID_IPQ5302 595
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#define QCOM_ID_IPQ5300 624
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+#define QCOM_ID_IPQ5321 650
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/*
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* The board type and revision information, used by Qualcomm bootloaders and
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