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ath79: ag71xx: Make builtin switch driver a separated module
This patch did several things: 1. Probe the builtin switch as a separated mdio device. 2. Register a separated mdio bus for builtin switch. 3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit is contained in:
Chuanhong Guo
John Crispin
parent
83d2dbc599
commit
7ae9e63719
@ -6,10 +6,9 @@ ag71xx-y += ag71xx_main.o
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ag71xx-y += ag71xx_gmac.o
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ag71xx-y += ag71xx_ethtool.o
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ag71xx-y += ag71xx_phy.o
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ag71xx-y += ag71xx_ar7240.o
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ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o
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obj-$(CONFIG_AG71XX) += ag71xx_ar7240.o
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obj-$(CONFIG_AG71XX) += ag71xx_mdio.o
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obj-$(CONFIG_AG71XX) += ag71xx.o
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@ -12,6 +12,8 @@
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#include <linux/etherdevice.h>
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#include <linux/list.h>
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#include <linux/netdevice.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include <linux/phy.h>
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#include <linux/mii.h>
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#include <linux/bitops.h>
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@ -291,7 +293,9 @@ struct ar7240sw_port_stat {
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struct ar7240sw {
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struct mii_bus *mii_bus;
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struct ag71xx_switch_platform_data *swdata;
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struct mii_bus *switch_mii_bus;
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struct device_node *of_node;
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struct device_node *mdio_node;
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struct switch_dev swdev;
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int num_ports;
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u8 ver;
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@ -366,9 +370,11 @@ static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg)
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phy_reg = mk_phy_reg(reg);
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local_irq_save(flags);
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ag71xx_mdio_mii_write(mii, 0x1f, 0x10, mk_high_addr(reg));
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lo = (u32) ag71xx_mdio_mii_read(mii, phy_addr, phy_reg);
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hi = (u32) ag71xx_mdio_mii_read(mii, phy_addr, phy_reg + 1);
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mutex_lock(&mii->mdio_lock);
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mii->write(mii, 0x1f, 0x10, mk_high_addr(reg));
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lo = (u32) mii->read(mii, phy_addr, phy_reg);
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hi = (u32) mii->read(mii, phy_addr, phy_reg + 1);
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mutex_unlock(&mii->mdio_lock);
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local_irq_restore(flags);
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return (hi << 16) | lo;
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@ -385,9 +391,11 @@ static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val)
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phy_reg = mk_phy_reg(reg);
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local_irq_save(flags);
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ag71xx_mdio_mii_write(mii, 0x1f, 0x10, mk_high_addr(reg));
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ag71xx_mdio_mii_write(mii, phy_addr, phy_reg + 1, (val >> 16));
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ag71xx_mdio_mii_write(mii, phy_addr, phy_reg, (val & 0xffff));
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mutex_lock(&mii->mdio_lock);
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mii->write(mii, 0x1f, 0x10, mk_high_addr(reg));
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mii->write(mii, phy_addr, phy_reg + 1, (val >> 16));
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mii->write(mii, phy_addr, phy_reg, (val & 0xffff));
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mutex_unlock(&mii->mdio_lock);
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local_irq_restore(flags);
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}
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@ -463,10 +471,12 @@ static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val,
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return ret;
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}
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int ar7240sw_phy_read(struct mii_bus *mii, int phy_addr, int reg_addr)
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int ar7240sw_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr)
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{
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u32 t, val = 0xffff;
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int err;
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struct ar7240sw *as = bus->priv;
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struct mii_bus *mii = as->mii_bus;
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if (phy_addr >= AR7240_NUM_PHYS)
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return 0xffff;
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@ -488,11 +498,13 @@ int ar7240sw_phy_read(struct mii_bus *mii, int phy_addr, int reg_addr)
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return val & AR7240_MDIO_CTRL_DATA_M;
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}
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int ar7240sw_phy_write(struct mii_bus *mii, int phy_addr, int reg_addr,
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int ar7240sw_phy_write(struct mii_bus *bus, int phy_addr, int reg_addr,
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u16 reg_val)
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{
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u32 t;
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int ret;
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struct ar7240sw *as = bus->priv;
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struct mii_bus *mii = as->mii_bus;
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if (phy_addr >= AR7240_NUM_PHYS)
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return -EINVAL;
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@ -646,6 +658,7 @@ ar7240sw_phy_poll_reset(struct mii_bus *bus)
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static int ar7240sw_reset(struct ar7240sw *as)
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{
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struct mii_bus *mii = as->mii_bus;
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struct mii_bus *swmii = as->switch_mii_bus;
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int ret;
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int i;
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@ -665,13 +678,13 @@ static int ar7240sw_reset(struct ar7240sw *as)
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/* setup PHYs */
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for (i = 0; i < AR7240_NUM_PHYS; i++) {
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ar7240sw_phy_write(mii, i, MII_ADVERTISE,
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ar7240sw_phy_write(swmii, i, MII_ADVERTISE,
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ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
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ADVERTISE_PAUSE_ASYM);
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ar7240sw_phy_write(mii, i, MII_BMCR,
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ar7240sw_phy_write(swmii, i, MII_BMCR,
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BMCR_RESET | BMCR_ANENABLE);
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}
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ret = ar7240sw_phy_poll_reset(mii);
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ret = ar7240sw_phy_poll_reset(swmii);
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if (ret)
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return ret;
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@ -1199,31 +1212,22 @@ static const struct switch_dev_ops ar7240_ops = {
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.get_port_stats = ar7240_get_port_stats,
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};
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static struct ar7240sw *
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ar7240_probe(struct ag71xx *ag, struct device_node *np)
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static int
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ag71xx_ar7240_probe(struct mdio_device *mdiodev)
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{
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struct mii_bus *mii = ag->mii_bus;
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struct mii_bus *mii = mdiodev->bus;
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struct ar7240sw *as;
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struct switch_dev *swdev;
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u32 ctrl;
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u16 phy_id1;
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u16 phy_id2;
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int i;
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int phy_if_mode, err, i;
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phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1);
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phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2);
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if ((phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) &&
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(phy_id1 != AR934X_PHY_ID1 || phy_id2 != AR934X_PHY_ID2)) {
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pr_err("%s: unknown phy id '%04x:%04x'\n",
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dev_name(&mii->dev), phy_id1, phy_id2);
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return NULL;
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}
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as = kzalloc(sizeof(*as), GFP_KERNEL);
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as = devm_kzalloc(&mdiodev->dev, sizeof(*as), GFP_KERNEL);
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if (!as)
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return NULL;
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return -ENOMEM;
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as->mii_bus = mii;
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as->of_node = mdiodev->dev.of_node;
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as->mdio_node = of_get_child_by_name(as->of_node, "mdio-bus");
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swdev = &as->swdev;
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@ -1236,20 +1240,21 @@ ar7240_probe(struct ag71xx *ag, struct device_node *np)
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swdev->ports = AR7240_NUM_PORTS - 1;
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} else if (sw_is_ar934x(as)) {
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swdev->name = "AR934X built-in switch";
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phy_if_mode = of_get_phy_mode(as->of_node);
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if (ag->phy_if_mode == PHY_INTERFACE_MODE_GMII) {
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if (phy_if_mode == PHY_INTERFACE_MODE_GMII) {
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ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0,
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AR934X_OPER_MODE0_MAC_GMII_EN);
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} else if (ag->phy_if_mode == PHY_INTERFACE_MODE_MII) {
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} else if (phy_if_mode == PHY_INTERFACE_MODE_MII) {
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ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0,
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AR934X_OPER_MODE0_PHY_MII_EN);
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} else {
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pr_err("%s: invalid PHY interface mode\n",
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dev_name(&mii->dev));
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goto err_free;
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dev_name(&mdiodev->dev));
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return -EINVAL;
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}
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if (of_property_read_bool(np, "phy4-mii-enable")) {
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if (of_property_read_bool(as->of_node, "phy4-mii-enable")) {
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ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1,
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AR934X_REG_OPER_MODE1_PHY4_MII_EN);
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swdev->ports = AR7240_NUM_PORTS - 1;
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@ -1258,57 +1263,69 @@ ar7240_probe(struct ag71xx *ag, struct device_node *np)
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}
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} else {
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pr_err("%s: unsupported chip, ctrl=%08x\n",
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dev_name(&mii->dev), ctrl);
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goto err_free;
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dev_name(&mdiodev->dev), ctrl);
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return -EINVAL;
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}
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swdev->cpu_port = AR7240_PORT_CPU;
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swdev->vlans = AR7240_MAX_VLANS;
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swdev->ops = &ar7240_ops;
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swdev->alias = dev_name(&mdiodev->dev);
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if (register_switch(&as->swdev, ag->dev) < 0)
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goto err_free;
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if ((err = register_switch(&as->swdev, NULL)) < 0)
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return err;
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pr_info("%s: Found an %s\n", dev_name(&mii->dev), swdev->name);
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pr_info("%s: Found an %s\n", dev_name(&mdiodev->dev), swdev->name);
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as->switch_mii_bus = devm_mdiobus_alloc(&mdiodev->dev);
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as->switch_mii_bus->name = "ar7240sw_mdio";
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as->switch_mii_bus->read = ar7240sw_phy_read;
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as->switch_mii_bus->write = ar7240sw_phy_write;
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as->switch_mii_bus->priv = as;
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as->switch_mii_bus->parent = &mdiodev->dev;
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snprintf(as->switch_mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&mdiodev->dev));
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if(as->mdio_node) {
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err = of_mdiobus_register(as->switch_mii_bus, as->mdio_node);
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if (err)
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return err;
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}
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/* initialize defaults */
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for (i = 0; i < AR7240_MAX_VLANS; i++)
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as->vlan_id[i] = i;
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as->vlan_table[0] = ar7240sw_port_mask_all(as);
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return as;
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err_free:
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kfree(as);
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return NULL;
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}
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int ag71xx_ar7240_init(struct ag71xx *ag, struct device_node *np)
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{
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struct ar7240sw *as;
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as = ar7240_probe(ag, np);
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if (!as)
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return -ENODEV;
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ag->phy_priv = as;
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ar7240sw_reset(as);
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ar7240_hw_apply(&as->swdev);
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rwlock_init(&as->stats_lock);
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dev_set_drvdata(&mdiodev->dev, as);
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return 0;
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}
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void ag71xx_ar7240_cleanup(struct ag71xx *ag)
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static void
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ag71xx_ar7240_remove(struct mdio_device *mdiodev)
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{
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struct ar7240sw *as = ag->phy_priv;
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if (!as)
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return;
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struct ar7240sw *as = dev_get_drvdata(&mdiodev->dev);
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if(as->mdio_node)
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mdiobus_unregister(as->switch_mii_bus);
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unregister_switch(&as->swdev);
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kfree(as);
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ag->phy_priv = NULL;
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}
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static const struct of_device_id ag71xx_sw_of_match[] = {
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{ .compatible = "qca,ar8216-builtin" },
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{ .compatible = "qca,ar8229-builtin" },
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{ /* sentinel */ },
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};
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static struct mdio_driver ag71xx_sw_driver = {
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.probe = ag71xx_ar7240_probe,
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.remove = ag71xx_ar7240_remove,
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.mdiodrv.driver = {
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.name = "ag71xx-switch",
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.of_match_table = ag71xx_sw_of_match,
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},
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};
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mdio_module_driver(ag71xx_sw_driver);
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MODULE_LICENSE("GPL");
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