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generic: phy-mediatek-xfi-tphy: fix SGMII issue
Fix issue of transmitting abnormal data which leads to link problems
in 1G and 2.5G SerDes modes (SGMII, 1000Base-X, 2500Base-X) on the
MediaTek MT7988 SoC.
Link: b72d6cba92
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit is contained in:
parent
71ccb35017
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79e9ce354e
@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o
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--- /dev/null
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+++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c
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@@ -0,0 +1,392 @@
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@@ -0,0 +1,393 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+/* MediaTek 10GE SerDes PHY driver
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+ *
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@ -272,6 +272,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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+ XTP_PCS_PWD_ASYNC(2));
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+
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+ usleep_range(1, 5);
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+ writel(XTP_LN_FRC_TX_DATA_EN, xfi_tphy->base + REG_DIG_LN_TRX_40);
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+
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+ /* Setup TX DA default value */
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+ mtk_xfi_tphy_rmw(xfi_tphy, 0x30b0, 0x30, 0x20);
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@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o
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--- /dev/null
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+++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c
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@@ -0,0 +1,392 @@
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@@ -0,0 +1,393 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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+/* MediaTek 10GE SerDes PHY driver
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+ *
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@ -272,6 +272,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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+ XTP_PCS_PWD_ASYNC(2));
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+
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+ usleep_range(1, 5);
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+ writel(XTP_LN_FRC_TX_DATA_EN, xfi_tphy->base + REG_DIG_LN_TRX_40);
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+
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+ /* Setup TX DA default value */
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+ mtk_xfi_tphy_rmw(xfi_tphy, 0x30b0, 0x30, 0x20);
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