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ar71xx: pb44_spi: introduce pb44_spi_{en,dis}able helpers
SVN-Revision: 29708
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0f566a376c
commit
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@ -86,10 +86,8 @@ static void pb44_spi_chipselect(struct spi_device *spi, int is_active)
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}
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static int pb44_spi_setup_cs(struct spi_device *spi)
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static void pb44_spi_enable(struct ar71xx_spi *sp)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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/* enable GPIO mode */
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pb44_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
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@ -97,8 +95,22 @@ static int pb44_spi_setup_cs(struct spi_device *spi)
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sp->reg_ctrl = pb44_spi_rr(sp, SPI_REG_CTRL);
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sp->ioc_base = pb44_spi_rr(sp, SPI_REG_IOC);
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/* TODO: setup speed? */
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pb44_spi_wr(sp, SPI_REG_CTRL, 0x43);
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}
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static void pb44_spi_disable(struct ar71xx_spi *sp)
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{
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/* restore CTRL register */
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pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
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/* disable GPIO mode */
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pb44_spi_wr(sp, SPI_REG_FS, 0);
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}
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static int pb44_spi_setup_cs(struct spi_device *spi)
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{
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struct ar71xx_spi *sp = spidev_to_sp(spi);
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pb44_spi_enable(sp);
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if (spi->chip_select) {
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unsigned long gpio = (unsigned long) spi->controller_data;
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@ -133,10 +145,7 @@ static void pb44_spi_cleanup_cs(struct spi_device *spi)
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gpio_free(gpio);
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}
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/* restore CTRL register */
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pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
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/* disable GPIO mode */
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pb44_spi_wr(sp, SPI_REG_FS, 0);
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pb44_spi_disable(sp);
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}
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static int pb44_spi_setup(struct spi_device *spi)
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