ath79: bump SPI frequency of Senao qca955x routers

All boards using this DTSI are expected to have
the same 16 MB MX25L12845EMI-10G flash chip,
or a larger one which can also use 40 MHz frequency.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
This commit is contained in:
Michael Pratt 2023-01-21 14:13:54 -05:00 committed by Hauke Mehrtens
parent 5e973dd61f
commit 51982560a9

View File

@ -55,7 +55,7 @@
flash@0 { flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-max-frequency = <25000000>; spi-max-frequency = <40000000>;
partitions { partitions {
compatible = "fixed-partitions"; compatible = "fixed-partitions";