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ipq806x: add CPU idle states
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
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@ -49,6 +49,7 @@ CONFIG_ARM_L1_CACHE_SHIFT_6=y
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# CONFIG_ARM_LPAE is not set
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CONFIG_ARM_PATCH_PHYS_VIRT=y
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CONFIG_ARM_QCOM_CPUFREQ=y
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CONFIG_ARM_QCOM_CPUIDLE=y
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# CONFIG_ARM_SMMU is not set
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# CONFIG_ARM_SP805_WATCHDOG is not set
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CONFIG_ARM_THUMB=y
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@ -36,6 +36,7 @@
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cooling-min-state = <0>;
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cooling-max-state = <10>;
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#cooling-cells = <2>;
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cpu-idle-states = <&CPU_SPC>;
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};
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cpu1: cpu@1 {
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@ -54,6 +55,7 @@
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cooling-min-state = <0>;
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cooling-max-state = <10>;
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#cooling-cells = <2>;
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cpu-idle-states = <&CPU_SPC>;
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};
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L2: l2-cache {
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@ -65,6 +67,16 @@
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qcom,l2 {
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qcom,l2-rates = <384000000 1000000000 1200000000>;
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};
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idle-states {
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CPU_SPC: spc {
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compatible = "qcom,idle-state-spc",
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"arm,idle-state";
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entry-latency-us = <400>;
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exit-latency-us = <900>;
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min-residency-us = <3000>;
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};
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};
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};
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cpu-pmu {
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@ -0,0 +1,29 @@
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From 252a4e72dfd7add3c37604449fd20db29d84c6f8 Mon Sep 17 00:00:00 2001
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From: Lina Iyer <lina.iyer@linaro.org>
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Date: Wed, 25 Mar 2015 14:25:29 -0600
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Subject: ARM: cpuidle: Add cpuidle support for QCOM cpus
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Define ARM_QCOM_CPUIDLE config item to enable cpuidle support.
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Cc: Stephen Boyd <sboyd@codeaurora.org>
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Cc: Arnd Bergmann <arnd@arndb.de>
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Cc: Kevin Hilman <khilman@linaro.org>
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Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
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Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
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---
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drivers/cpuidle/Kconfig.arm | 7 +++++++
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1 file changed, 7 insertions(+)
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--- a/drivers/cpuidle/Kconfig.arm
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+++ b/drivers/cpuidle/Kconfig.arm
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@@ -74,3 +74,10 @@ config ARM_MVEBU_V7_CPUIDLE
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depends on ARCH_MVEBU && !ARM64
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help
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Select this to enable cpuidle on Armada 370, 38x and XP processors.
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+
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+config ARM_QCOM_CPUIDLE
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+ bool "CPU Idle Driver for QCOM processors"
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+ depends on ARCH_QCOM
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+ select ARM_CPUIDLE
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+ help
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+ Select this to enable cpuidle on QCOM processors.
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@ -0,0 +1,60 @@
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From 3985d2c24d96f72211488fc6ebb53b032e4d0a05 Mon Sep 17 00:00:00 2001
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From: Pavel Kubelun <be.dissent@gmail.com>
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Date: Sun, 6 Nov 2016 19:02:34 +0300
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Subject: [PATCH] ipq806x: add cpu idle state into ipq8064 DT
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Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 16 ++++++++++++++--
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1 file changed, 14 insertions(+), 2 deletions(-)
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diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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index cb9c41d..8c989c0 100644
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -18,7 +18,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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- cpu@0 {
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+ cpu0: cpu@0 {
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compatible = "qcom,krait";
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enable-method = "qcom,kpss-acc-v1";
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device_type = "cpu";
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@@ -31,9 +31,10 @@
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clock-latency = <100000>;
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cpu-supply = <&smb208_s2a>;
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voltage-tolerance = <5>;
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+ cpu-idle-states = <&CPU_SPC>;
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};
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- cpu@1 {
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+ cpu1: cpu@1 {
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compatible = "qcom,krait";
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enable-method = "qcom,kpss-acc-v1";
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device_type = "cpu";
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@@ -45,6 +46,7 @@
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clock-names = "cpu", "l2";
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clock-latency = <100000>;
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cpu-supply = <&smb208_s2b>;
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+ cpu-idle-states = <&CPU_SPC>;
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};
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L2: l2-cache {
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@@ -56,6 +58,16 @@
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qcom,l2 {
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qcom,l2-rates = <384000000 1000000000 1200000000>;
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};
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+
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+ idle-states {
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+ CPU_SPC: spc {
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+ compatible = "qcom,idle-state-spc",
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+ "arm,idle-state";
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+ entry-latency-us = <400>;
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+ exit-latency-us = <900>;
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+ min-residency-us = <3000>;
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+ };
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+ };
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};
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cpu-pmu {
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