mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2024-12-18 12:54:39 +00:00
realtek: initialize port masks to match the default state
All ports are disabled by default, so configure the port isolation masks and the pm field accordingly in the setup function. When port_enable is called for a port, the isolation masks will be set up so that traffic can flow between the port and the CPU. While at it, change the code to also use the traffic_set method in rtl83xx_setup, instead of writing to the RTL838x_PORT_ISO_CTRL(i) registers directly. Signed-off-by: Jan Hoffmann <jan@3e8.eu>
This commit is contained in:
parent
3af984e46e
commit
4c0a1667f3
@ -176,7 +176,6 @@ static int rtl83xx_setup(struct dsa_switch *ds)
|
||||
{
|
||||
int i;
|
||||
struct rtl838x_switch_priv *priv = ds->priv;
|
||||
u64 port_bitmap = BIT_ULL(priv->cpu_port);
|
||||
|
||||
pr_debug("%s called\n", __func__);
|
||||
|
||||
@ -187,18 +186,16 @@ static int rtl83xx_setup(struct dsa_switch *ds)
|
||||
priv->ports[i].enable = false;
|
||||
priv->ports[priv->cpu_port].enable = true;
|
||||
|
||||
/* Isolate ports from each other: traffic only CPU <-> port */
|
||||
/* Setting bit j in register RTL838X_PORT_ISO_CTRL(i) allows
|
||||
* traffic from source port i to destination port j
|
||||
/* Configure ports so they are disabled by default, but once enabled
|
||||
* they will work in isolated mode (only traffic between port and CPU).
|
||||
*/
|
||||
for (i = 0; i < priv->cpu_port; i++) {
|
||||
if (priv->ports[i].phy) {
|
||||
priv->r->set_port_reg_be(BIT_ULL(priv->cpu_port) | BIT_ULL(i),
|
||||
priv->r->port_iso_ctrl(i));
|
||||
port_bitmap |= BIT_ULL(i);
|
||||
priv->ports[i].pm = BIT_ULL(priv->cpu_port);
|
||||
priv->r->traffic_set(i, BIT_ULL(i));
|
||||
}
|
||||
}
|
||||
priv->r->set_port_reg_be(port_bitmap, priv->r->port_iso_ctrl(priv->cpu_port));
|
||||
priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
|
||||
|
||||
if (priv->family_id == RTL8380_FAMILY_ID)
|
||||
rtl838x_print_matrix();
|
||||
@ -240,7 +237,6 @@ static int rtl93xx_setup(struct dsa_switch *ds)
|
||||
{
|
||||
int i;
|
||||
struct rtl838x_switch_priv *priv = ds->priv;
|
||||
u32 port_bitmap = BIT(priv->cpu_port);
|
||||
|
||||
pr_info("%s called\n", __func__);
|
||||
|
||||
@ -258,13 +254,16 @@ static int rtl93xx_setup(struct dsa_switch *ds)
|
||||
priv->ports[i].enable = false;
|
||||
priv->ports[priv->cpu_port].enable = true;
|
||||
|
||||
/* Configure ports so they are disabled by default, but once enabled
|
||||
* they will work in isolated mode (only traffic between port and CPU).
|
||||
*/
|
||||
for (i = 0; i < priv->cpu_port; i++) {
|
||||
if (priv->ports[i].phy) {
|
||||
priv->r->traffic_set(i, BIT_ULL(priv->cpu_port) | BIT_ULL(i));
|
||||
port_bitmap |= BIT_ULL(i);
|
||||
priv->ports[i].pm = BIT_ULL(priv->cpu_port);
|
||||
priv->r->traffic_set(i, BIT_ULL(i));
|
||||
}
|
||||
}
|
||||
priv->r->traffic_set(priv->cpu_port, port_bitmap);
|
||||
priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
|
||||
|
||||
rtl930x_print_matrix();
|
||||
|
||||
|
@ -167,7 +167,6 @@ static void rtl83xx_port_set_salrn(struct rtl838x_switch_priv *priv,
|
||||
static int rtl83xx_setup(struct dsa_switch *ds)
|
||||
{
|
||||
struct rtl838x_switch_priv *priv = ds->priv;
|
||||
u64 port_bitmap = BIT_ULL(priv->cpu_port);
|
||||
|
||||
pr_debug("%s called\n", __func__);
|
||||
|
||||
@ -178,18 +177,16 @@ static int rtl83xx_setup(struct dsa_switch *ds)
|
||||
priv->ports[i].enable = false;
|
||||
priv->ports[priv->cpu_port].enable = true;
|
||||
|
||||
/* Isolate ports from each other: traffic only CPU <-> port */
|
||||
/* Setting bit j in register RTL838X_PORT_ISO_CTRL(i) allows
|
||||
* traffic from source port i to destination port j
|
||||
/* Configure ports so they are disabled by default, but once enabled
|
||||
* they will work in isolated mode (only traffic between port and CPU).
|
||||
*/
|
||||
for (int i = 0; i < priv->cpu_port; i++) {
|
||||
if (priv->ports[i].phy) {
|
||||
priv->r->set_port_reg_be(BIT_ULL(priv->cpu_port) | BIT_ULL(i),
|
||||
priv->r->port_iso_ctrl(i));
|
||||
port_bitmap |= BIT_ULL(i);
|
||||
priv->ports[i].pm = BIT_ULL(priv->cpu_port);
|
||||
priv->r->traffic_set(i, BIT_ULL(i));
|
||||
}
|
||||
}
|
||||
priv->r->set_port_reg_be(port_bitmap, priv->r->port_iso_ctrl(priv->cpu_port));
|
||||
priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
|
||||
|
||||
if (priv->family_id == RTL8380_FAMILY_ID)
|
||||
rtl838x_print_matrix();
|
||||
@ -229,7 +226,6 @@ static int rtl83xx_setup(struct dsa_switch *ds)
|
||||
static int rtl93xx_setup(struct dsa_switch *ds)
|
||||
{
|
||||
struct rtl838x_switch_priv *priv = ds->priv;
|
||||
u32 port_bitmap = BIT(priv->cpu_port);
|
||||
|
||||
pr_info("%s called\n", __func__);
|
||||
|
||||
@ -247,13 +243,16 @@ static int rtl93xx_setup(struct dsa_switch *ds)
|
||||
priv->ports[i].enable = false;
|
||||
priv->ports[priv->cpu_port].enable = true;
|
||||
|
||||
/* Configure ports so they are disabled by default, but once enabled
|
||||
* they will work in isolated mode (only traffic between port and CPU).
|
||||
*/
|
||||
for (int i = 0; i < priv->cpu_port; i++) {
|
||||
if (priv->ports[i].phy) {
|
||||
priv->r->traffic_set(i, BIT_ULL(priv->cpu_port) | BIT_ULL(i));
|
||||
port_bitmap |= BIT_ULL(i);
|
||||
priv->ports[i].pm = BIT_ULL(priv->cpu_port);
|
||||
priv->r->traffic_set(i, BIT_ULL(i));
|
||||
}
|
||||
}
|
||||
priv->r->traffic_set(priv->cpu_port, port_bitmap);
|
||||
priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
|
||||
|
||||
rtl930x_print_matrix();
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user