ath9k: fix interrupt storms on AR913x
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 39062
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@ -11856,7 +11856,18 @@
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ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);
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ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);
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ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);
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ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);
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}
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}
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@@ -120,7 +139,12 @@ static bool ar9002_hw_get_isr(struct ath
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@@ -114,13 +133,23 @@ static bool ar9002_hw_get_isr(struct ath
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*masked |= mask2;
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}
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+ if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
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+ REG_WRITE(ah, AR_ISR, isr);
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+ REG_READ(ah, AR_ISR);
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+ }
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+
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if (AR_SREV_9100(ah))
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return true;
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if (isr & AR_ISR_GENTMR) {
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if (isr & AR_ISR_GENTMR) {
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u32 s5_s;
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u32 s5_s;
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@ -11870,7 +11881,7 @@
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ah->intr_gen_timer_trigger =
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ah->intr_gen_timer_trigger =
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MS(s5_s, AR_ISR_S5_GENTIMER_TRIG);
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MS(s5_s, AR_ISR_S5_GENTIMER_TRIG);
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@@ -133,6 +157,16 @@ static bool ar9002_hw_get_isr(struct ath
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@@ -133,6 +162,11 @@ static bool ar9002_hw_get_isr(struct ath
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if ((s5_s & AR_ISR_S5_TIM_TIMER) &&
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if ((s5_s & AR_ISR_S5_TIM_TIMER) &&
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!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
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!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
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*masked |= ATH9K_INT_TIM_TIMER;
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*masked |= ATH9K_INT_TIM_TIMER;
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@ -11879,11 +11890,6 @@
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+ REG_WRITE(ah, AR_ISR_S5, s5_s);
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+ REG_WRITE(ah, AR_ISR_S5, s5_s);
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+ isr &= ~AR_ISR_GENTMR;
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+ isr &= ~AR_ISR_GENTMR;
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+ }
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+ }
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+ }
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+
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+ if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
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+ REG_WRITE(ah, AR_ISR, isr);
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+ REG_READ(ah, AR_ISR);
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}
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}
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if (sync_cause) {
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if (sync_cause) {
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