mediatek: pull in some fixes fromt he latest SDK
Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
John Crispin
parent
2ddd8387a7
commit
4841ac042e
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@ -0,0 +1,26 @@
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--- a/drivers/crypto/inside-secure/safexcel.h
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+++ b/drivers/crypto/inside-secure/safexcel.h
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@@ -722,6 +722,9 @@
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/* Priority we use for advertising our algorithms */
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#define SAFEXCEL_CRA_PRIORITY 300
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+/* System cache line size */
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+#define SYSTEM_CACHELINE_SIZE 64
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+
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/* SM3 digest result for zero length message */
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#define EIP197_SM3_ZEROM_HASH "\x1A\xB2\x1D\x83\x55\xCF\xA1\x7F" \
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"\x8E\x61\x19\x48\x31\xE8\x1A\x8F" \
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--- a/drivers/crypto/inside-secure/safexcel_hash.c
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+++ b/drivers/crypto/inside-secure/safexcel_hash.c
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@@ -57,9 +57,9 @@
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u8 block_sz; /* block size, only set once */
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u8 digest_sz; /* output digest size, only set once */
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__le32 state[SHA3_512_BLOCK_SIZE /
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- sizeof(__le32)] __aligned(sizeof(__le32));
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+ sizeof(__le32)] __aligned(SYSTEM_CACHELINE_SIZE);
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- u64 len;
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+ u64 len __aligned(SYSTEM_CACHELINE_SIZE);
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u64 processed;
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u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32));
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@ -0,0 +1,60 @@
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:28.403764254 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-08-25 14:57:39.803438475 +0800
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@@ -2193,7 +2193,7 @@
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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mtk_w32(eth,
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MTK_TX_DMA_EN |
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- MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
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+ MTK_DMA_SIZE_32DWORDS | MTK_NDP_CO_PRO |
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MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
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MTK_RX_BT_32DWORDS,
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MTK_QDMA_GLO_CFG);
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@@ -2434,11 +2434,10 @@
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/* Enable RX VLan Offloading */
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mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
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- /* enable interrupt delay for RX */
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- mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT);
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+ /* enable interrupt delay for RX/TX */
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+ mtk_w32(eth, 0x8f0f8f0f, MTK_PDMA_DELAY_INT);
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+ mtk_w32(eth, 0x8f0f8f0f, MTK_QDMA_DELAY_INT);
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- /* disable delay and normal interrupt */
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- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
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mtk_tx_irq_disable(eth, ~0);
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mtk_rx_irq_disable(eth, ~0);
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diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:22.939920398 +0800
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-08-25 14:57:43.359336855 +0800
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@@ -19,8 +19,8 @@
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#define MTK_QDMA_PAGE_SIZE 2048
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#define MTK_MAX_RX_LENGTH 1536
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#define MTK_TX_DMA_BUF_LEN 0x3fff
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-#define MTK_DMA_SIZE 256
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-#define MTK_NAPI_WEIGHT 64
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+#define MTK_DMA_SIZE 2048
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+#define MTK_NAPI_WEIGHT 256
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#define MTK_MAC_COUNT 2
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#define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)
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#define MTK_RX_HLEN (NET_SKB_PAD + MTK_RX_ETH_HLEN + NET_IP_ALIGN)
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@@ -198,6 +198,7 @@
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#define MTK_NDP_CO_PRO BIT(10)
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#define MTK_TX_WB_DDONE BIT(6)
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#define MTK_DMA_SIZE_16DWORDS (2 << 4)
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+#define MTK_DMA_SIZE_32DWORDS (3 << 4)
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#define MTK_RX_DMA_BUSY BIT(3)
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#define MTK_TX_DMA_BUSY BIT(1)
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#define MTK_RX_DMA_EN BIT(2)
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@@ -228,8 +229,8 @@
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#define MTK_TX_DONE_INT1 BIT(1)
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#define MTK_TX_DONE_INT0 BIT(0)
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#define MTK_RX_DONE_INT MTK_RX_DONE_DLY
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-#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
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- MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
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+#define MTK_TX_DONE_DLY BIT(28)
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+#define MTK_TX_DONE_INT MTK_TX_DONE_DLY
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/* QDMA Interrupt grouping registers */
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#define MTK_QDMA_INT_GRP1 0x1a20
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@ -0,0 +1,23 @@
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--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 2020-07-16 16:31:01.073767264 +0800
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+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts 2020-07-16 16:33:02.518867067 +0800
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@@ -579,17 +579,17 @@
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factory: partition@1c0000 {
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label = "Factory";
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- reg = <0x1c0000 0x0040000>;
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+ reg = <0x1c0000 0x0100000>;
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};
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partition@200000 {
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label = "firmware";
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- reg = <0x200000 0x2000000>;
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+ reg = <0x2c0000 0x2000000>;
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};
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partition@2200000 {
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label = "User_data";
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- reg = <0x2200000 0x4000000>;
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+ reg = <0x22c0000 0x4000000>;
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};
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};
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};
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