bcm53xx: use backported BCM5301X patches from stblinux devicetree/next
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> SVN-Revision: 47708
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@ -1,6 +1,6 @@
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From a0aef7fbab0d8b5a0d445c74990e5233beda246e Mon Sep 17 00:00:00 2001
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From ccf0b5e37115f8675455632f583d06ea94f43539 Mon Sep 17 00:00:00 2001
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From: Jon Mason <jonmason@broadcom.com>
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Date: Wed, 21 Oct 2015 18:46:04 -0400
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Date: Mon, 2 Nov 2015 13:34:53 -0500
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Subject: [PATCH] ARM: dts: bcm5301x: Add BCM SVK DT files
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Add device tree files for Broadcom Northstar based SVKs. Since the
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@ -8,6 +8,7 @@ bcm5301x.dtsi already exists, all that is necessary is the dts files to
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enable the UARTs. With these files, the SVKs are able to boot to shell.
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Signed-off-by: Jon Mason <jonmason@broadcom.com>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/Makefile | 5 +++-
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arch/arm/boot/dts/bcm94708.dts | 56 +++++++++++++++++++++++++++++++++++
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@ -1,15 +1,17 @@
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From e96ef422d0095fe9ae39b03c0805a0db8ff7e382 Mon Sep 17 00:00:00 2001
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From cdc36b22f0e4b8badf3db14395f0aa44dcbce4b3 Mon Sep 17 00:00:00 2001
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From: Jon Mason <jonmason@broadcom.com>
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Date: Tue, 13 Oct 2015 17:22:25 -0400
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Subject: [PATCH 50/50] ARM: dts: enable clock support for BCM5301X
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Date: Fri, 20 Nov 2015 10:17:18 -0500
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Subject: [PATCH] ARM: dts: enable clock support for BCM5301X
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Replace current device tree dummy clocks with real clock support for
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Broadcom Northstar SoCs.
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Signed-off-by: Jon Mason <jonmason@broadcom.com>
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Reviewed-by: Ray Jui <rjui@broadcom.com>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/bcm5301x.dtsi | 88 ++++++++++++++++++++++++++++++++---------
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1 file changed, 69 insertions(+), 19 deletions(-)
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arch/arm/boot/dts/bcm5301x.dtsi | 92 +++++++++++++++++++++++++++++++----------
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1 file changed, 71 insertions(+), 21 deletions(-)
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@ -21,7 +23,24 @@ Signed-off-by: Jon Mason <jonmason@broadcom.com>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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@@ -42,41 +43,48 @@
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@@ -27,7 +28,7 @@
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compatible = "ns16550";
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reg = <0x0300 0x100>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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- clock-frequency = <100000000>;
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+ clocks = <&iprocslow>;
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status = "disabled";
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};
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@@ -35,48 +36,55 @@
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compatible = "ns16550";
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reg = <0x0400 0x100>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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- clock-frequency = <100000000>;
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+ clocks = <&iprocslow>;
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status = "disabled";
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};
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};
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mpcore {
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compatible = "simple-bus";
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@ -102,8 +121,7 @@ Signed-off-by: Jon Mason <jonmason@broadcom.com>
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+ };
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+
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+ iprocmed: iprocmed {
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#clock-cells = <0>;
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- clock-frequency = <400000000>;
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+ #clock-cells = <0>;
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+ compatible = "fixed-factor-clock";
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+ clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
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+ clock-div = <2>;
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@ -119,7 +137,8 @@ Signed-off-by: Jon Mason <jonmason@broadcom.com>
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+ };
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+
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+ periph_clk: periph_clk {
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+ #clock-cells = <0>;
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#clock-cells = <0>;
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- clock-frequency = <400000000>;
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+ compatible = "fixed-factor-clock";
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+ clocks = <&a9pll>;
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+ clock-div = <2>;
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@ -127,11 +146,10 @@ Signed-off-by: Jon Mason <jonmason@broadcom.com>
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};
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};
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@@ -189,4 +220,23 @@
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brcm,nand-has-wp;
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@@ -178,6 +209,25 @@
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};
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};
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+
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+ lcpll0: lcpll0@1800c100 {
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+ #clock-cells = <1>;
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+ compatible = "brcm,nsp-lcpll0";
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@ -150,4 +168,7 @@ Signed-off-by: Jon Mason <jonmason@broadcom.com>
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+ "usbclk", "iprocfast", "sata1",
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+ "sata2";
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+ };
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};
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+
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nand: nand@18028000 {
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compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
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reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
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