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ath9k: add some ani related stability / performance fixes
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 42443
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@ -1,3 +1,33 @@
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commit 0fecedddd4a0945873db1bd230ec6a168b3cc4fe
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Mon Sep 8 18:35:08 2014 +0200
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ath9k_hw: reduce ANI spur immunity setting on HT40 extension channel
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The cycpwr_thr1 value needs to be lower on the extension channel than on
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the control channel, similar to how the register settings are programmed
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in the initvals.
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Also drop the unnecessary check for HT40 - this register can always be
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written. This patch has been reported to improve HT40 stability and
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throughput in some environments.
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit 30d7434ccb853b96de698a040888fa4dacd0cc19
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Mon Sep 8 18:31:26 2014 +0200
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Revert "ath9k_hw: reduce ANI firstep range for older chips"
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This reverts commit 09efc56345be4146ab9fc87a55c837ed5d6ea1ab
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I've received reports that this change is decreasing throughput in some
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rare conditions on an AR9280 based device
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Cc: stable@vger.kernel.org
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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commit 15ed54948f508ad1baad79c30050e2d29a21696d
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Author: Felix Fietkau <nbd@openwrt.org>
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Date: Fri Jul 25 16:18:03 2014 +0200
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@ -3109,3 +3139,30 @@ Date: Mon May 19 21:20:49 2014 +0200
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if (!compat)
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compat = &sdata->vif.bss_conf.chandef;
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--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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@@ -1004,9 +1004,11 @@ static bool ar5008_hw_ani_control_new(st
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case ATH9K_ANI_FIRSTEP_LEVEL:{
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u32 level = param;
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- value = level;
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+ value = level * 2;
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REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
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AR_PHY_FIND_SIG_FIRSTEP, value);
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+ REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW,
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+ AR_PHY_FIND_SIG_FIRSTEP_LOW, value);
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if (level != aniState->firstepLevel) {
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ath_dbg(common, ANI,
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@@ -1040,9 +1042,8 @@ static bool ar5008_hw_ani_control_new(st
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REG_RMW_FIELD(ah, AR_PHY_TIMING5,
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AR_PHY_TIMING5_CYCPWR_THR1, value);
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- if (IS_CHAN_HT40(ah->curchan))
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- REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
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- AR_PHY_EXT_TIMING5_CYCPWR_THR1, value);
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+ REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
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+ AR_PHY_EXT_TIMING5_CYCPWR_THR1, value - 1);
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if (level != aniState->spurImmunityLevel) {
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ath_dbg(common, ANI,
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@ -110,7 +110,7 @@
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static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
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--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
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@@ -1231,9 +1231,30 @@ static void ar5008_hw_set_radar_conf(str
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@@ -1232,9 +1232,30 @@ static void ar5008_hw_set_radar_conf(str
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conf->radar_inband = 8;
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}
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@ -141,7 +141,7 @@
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static const u32 ar5416_cca_regs[6] = {
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AR_PHY_CCA,
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AR_PHY_CH1_CCA,
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@@ -1248,6 +1269,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
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@@ -1249,6 +1270,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
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if (ret)
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return ret;
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