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mvebu: add support for SolidRun ClearFog Pro
The SolidRun ClearFog Pro is a router based on the SolidRun CN9130 SOM. Specs: - SoC: Quad-Core Cortex-A72 CN9130 SoC - RAM: 4GiB DDR4 - Serial: Micro-USB port on front (FT232R, 115200 8n1) - Storage: 8GiB eMMC, microSD card slot, 8MiB SPI NOR flash - Ethernet: 7x GbE (1 port dedicated on SoC, 6 port switch with single GbE CPU port) - SFP: 1x SFP+ - USB: 1x USB-A 3.1 Gen 1 - PCIe: 2x mini PCIe (one slot with USB and SIM card socket) - SATA: 1x M.2 Key-B In addition to the usual connectivity options this device also features an internal mikroBUS expansion connector. SATA is currently untested due to lack of a suitable M.2 SSD. Installation ============ 1. Write sdcard sysupgrade image to microSD card using dd or similar 2. Insert microSD card into router and apply power 3. Device boots into OpenWRT 4. (optional) dd sysupgrade image to /dev/mmcblk0 to install to eMMC Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
This commit is contained in:
Tobias Schramm
Christian Lamparter
parent
1ed01ef606
commit
336a531c15
@ -32,6 +32,9 @@ marvell,armada7040-db)
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marvell,armada8040-clearfog-gt-8k)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 eth2" "eth0 eth1"
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;;
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solidrun,clearfog-pro)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5 lan6 eth0 eth1" "eth2"
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;;
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*)
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ucidef_set_interface_lan "eth0"
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;;
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@ -14,7 +14,8 @@ platform_check_image() {
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iei,puzzle-m902|\
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marvell,armada8040-mcbin-doubleshot|\
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marvell,armada8040-mcbin-singleshot|\
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marvell,armada8040-clearfog-gt-8k)
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marvell,armada8040-clearfog-gt-8k|\
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solidrun,clearfog-pro)
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legacy_sdcard_check_image "$1"
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;;
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*)
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@ -32,7 +33,8 @@ platform_do_upgrade() {
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globalscale,mochabin|\
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marvell,armada8040-mcbin-doubleshot|\
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marvell,armada8040-mcbin-singleshot|\
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marvell,armada8040-clearfog-gt-8k)
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marvell,armada8040-clearfog-gt-8k|\
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solidrun,clearfog-pro)
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legacy_sdcard_do_upgrade "$1"
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;;
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*)
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@ -47,7 +49,8 @@ platform_copy_config() {
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iei,puzzle-m902|\
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marvell,armada8040-mcbin-doubleshot|\
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marvell,armada8040-mcbin-singleshot|\
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marvell,armada8040-clearfog-gt-8k)
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marvell,armada8040-clearfog-gt-8k|\
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solidrun,clearfog-pro)
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legacy_sdcard_copy_config
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;;
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esac
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@ -41,7 +41,9 @@ CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
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CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
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CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
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CONFIG_CPU_LITTLE_ENDIAN=y
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CONFIG_CRC_CCITT=y
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CONFIG_DMA_DIRECT_REMAP=y
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CONFIG_EEPROM_AT24=y
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CONFIG_FRAME_POINTER=y
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CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_REGS=y
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CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
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@ -66,6 +68,9 @@ CONFIG_MVEBU_SEI=y
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CONFIG_MVPP2=y
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CONFIG_MV_XOR_V2=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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CONFIG_NVMEM_LAYOUTS=y
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CONFIG_NVMEM_LAYOUT_ONIE_TLV=y
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CONFIG_NVMEM_SYSFS=y
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CONFIG_PARTITION_PERCPU=y
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CONFIG_PCIEAER=y
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CONFIG_PCIEPORTBUS=y
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@ -74,6 +79,7 @@ CONFIG_PCIE_DW=y
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CONFIG_PCIE_DW_HOST=y
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# CONFIG_PCI_AARDVARK is not set
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CONFIG_PGTABLE_LEVELS=3
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CONFIG_PHYLIB_LEDS=y
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CONFIG_PHYS_ADDR_T_64BIT=y
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CONFIG_PHY_MVEBU_CP110_COMPHY=y
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CONFIG_PHY_MVEBU_CP110_UTMI=y
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@ -0,0 +1,513 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright SolidRun Ltd.
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* Copyright (C) 2024 Tobias Schramm <tobias@t-sys.eu>
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*
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* Device tree for the CN9130-based ClearFog Pro
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*/
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#include "cn9130.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "SolidRun ClearFog Pro";
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compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad",
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"marvell,armada-ap807";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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gpio1 = &cp0_gpio1;
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gpio2 = &cp0_gpio2;
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i2c0 = &cp0_i2c0;
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ethernet0 = &cp0_eth0;
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ethernet1 = &cp0_eth1;
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ethernet2 = &cp0_eth2;
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spi1 = &cp0_spi1;
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};
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memory@00000000 {
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reg = <0x0 0x0 0x1 0x0>;
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device_type = "memory";
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};
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/* Virtual regulator, root of power tree */
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vin: regulator-vin {
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compatible = "regulator-fixed";
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regulator-name = "vin";
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regulator-always-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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/* Regulators supplied by vin */
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v_5v0: regulator-v_5v0 {
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compatible = "regulator-fixed";
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regulator-name = "v_5v0";
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vin>;
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};
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v_3v3: regulator-v_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "v_3v3";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vin>;
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};
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/* Regulators supplied by v_5v0 */
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v_1v8: regulator-v_1v8 {
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compatible = "regulator-fixed";
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regulator-name = "v_1v8";
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&v_5v0>;
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};
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v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus {
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compatible = "regulator-fixed";
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regulator-name = "v_5v0_usb3_hst_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&expander0 6 GPIO_ACTIVE_LOW>;
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vin-supply = <&v_5v0>;
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};
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/* Regulators internal to SOM */
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vqmmc: regulator-vqmmc {
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compatible = "regulator-fixed";
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regulator-name = "vqmmc";
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&v_5v0>;
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};
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cp0_usb3_0_phy1: cp0_usb3_phy@1 {
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compatible = "usb-nop-xceiv";
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vbus-supply = <&v_5v0_usb3_hst_vbus>;
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};
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cp0_sfp_eth0: sfp-eth@0 {
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compatible = "sff,sfp";
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i2c-bus = <&cp0_i2c1>;
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los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
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tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <2000>;
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_button_pin>;
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reset {
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label = "Reset";
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linux,code = <KEY_RESTART>;
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gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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/* on-board eMMC */
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&ap_sdhci0 {
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bus-width = <8>;
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pinctrl-names = "default";
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vqmmc-supply = <&vqmmc>;
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status = "okay";
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};
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&cp0_crypto {
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status = "okay";
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};
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&cp0_ethernet {
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status = "okay";
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};
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&cp0_gpio1 {
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status = "okay";
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};
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&cp0_gpio2 {
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status = "okay";
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};
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&cp0_i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c0_pins>;
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clock-frequency = <100000>;
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/*
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* PCA9655 GPIO expander, up to 1MHz clock.
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* 0-CON3 CLKREQ#
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* 1-CON3 PERST#
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* 2-CON2 PERST#
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* 3-CON3 W_DISABLE
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* 4-CON2 CLKREQ#
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* 5-USB3 overcurrent
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* 6-USB3 power
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* 7-CON2 W_DISABLE
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* 8-JP4 P1
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* 9-JP4 P4
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* 10-JP4 P5
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* 11-m.2 DEVSLP
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* 12-SFP_LOS
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* 13-SFP_TX_FAULT
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* 14-SFP_TX_DISABLE
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* 15-SFP_MOD_DEF0
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*/
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expander0: gpio-expander@20 {
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compatible = "nxp,pca9555";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cp0_gpio1>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_expander0_pins>;
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vcc-supply = <&v_3v3>;
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pcie1_0_clkreq {
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gpio-hog;
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gpios = <0 GPIO_ACTIVE_LOW>;
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input;
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line-name = "pcie1.0-clkreq";
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};
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pcie1_0_w_disable {
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gpio-hog;
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gpios = <3 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "pcie1.0-w-disable";
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};
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pcie2_0_clkreq {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_LOW>;
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input;
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line-name = "pcie2.0-clkreq";
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};
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pcie2_0_w_disable {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "pcie2.0-w-disable";
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};
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usb3_ilimit {
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gpio-hog;
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gpios = <5 GPIO_ACTIVE_LOW>;
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input;
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line-name = "usb3-current-limit";
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};
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m2_devslp {
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gpio-hog;
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gpios = <11 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "m.2 devslp";
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};
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};
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/* ADC only for mikroBUS connector */
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mcp3021@4c {
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compatible = "microchip,mcp3021";
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reg = <0x4c>;
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};
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/* EEPROM on the SOM */
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eeprom@53 {
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compatible = "atmel,24c02";
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reg = <0x53>;
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pagesize = <16>;
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read-only;
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nvmem-layout {
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compatible = "onie,tlv-layout";
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onie_tlv_macaddr: mac-address {
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#nvmem-cell-cells = <1>;
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};
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};
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};
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};
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/* SMBUS on mini PCIe sockets */
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&cp0_i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_i2c1_pins>;
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clock-frequency = <100000>;
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};
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&cp0_mdio {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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/* Green led blinks on activity, orange LED on link */
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marvell,reg-init = <3 16 0 0x0064>;
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};
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switch@4 {
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compatible = "marvell,mv88e6085";
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reg = <4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cp0_gpio1>;
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interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cp0_dsa0_pins>;
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reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>;
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mdio-external {
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compatible = "marvell,mv88e6xxx-mdio-external";
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#address-cells = <1>;
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#size-cells = <0>;
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/* 88E1512 PHY */
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port6_phy: ethernet-phy@1 {
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reg = <1>;
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan5";
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};
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port@1 {
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reg = <1>;
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label = "lan4";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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};
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port@4 {
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reg = <4>;
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label = "lan1";
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};
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port@5 {
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reg = <5>;
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ethernet = <&cp0_eth1>;
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label = "cpu";
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@6 {
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/* 88E1512 external phy */
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reg = <6>;
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label = "lan6";
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phy-handle = <&port6_phy>;
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phy-mode = "rgmii-id";
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};
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};
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};
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};
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/* SRDS #0 - SATA on bottom M.2 B-Key connector */
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&cp0_sata0 {
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status = "okay";
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sata-port@0 {
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status = "disabled";
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};
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sata-port@1 {
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phys = <&cp0_comphy0 1>;
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target-supply = <&v_3v3>;
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};
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};
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&cp0_utmi {
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status = "okay";
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};
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/* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */
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&cp0_usb3_0 {
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status = "okay";
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phys = <&cp0_utmi0>;
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phy-names = "utmi";
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dr_mode = "host";
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};
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/* SRDS #1 - USB-A 3.0 host port */
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&cp0_usb3_1 {
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status = "okay";
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phys = <&cp0_utmi1>, <&cp0_comphy1 0>;
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phy-names = "utmi", "usb";
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usb-phy = <&cp0_usb3_0_phy1>;
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dr_mode = "host";
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};
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/* SRDS #2 - SFP+ 10GE */
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&cp0_eth0 {
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status = "okay";
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phy-mode = "10gbase-r";
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||||
phys = <&cp0_comphy2 0>;
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managed = "in-band-status";
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nvmem-cells = <&onie_tlv_macaddr 0>;
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nvmem-cell-names = "mac-address";
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sfp = <&cp0_sfp_eth0>;
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};
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/* SRDS #3 - SGMII 1GE to L2 switch */
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&cp0_eth1 {
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status = "okay";
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phys = <&cp0_comphy3 1>;
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phy-mode = "sgmii";
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nvmem-cells = <&onie_tlv_macaddr 1>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
|
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full-duplex;
|
||||
};
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||||
};
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|
||||
/* SRDS #4 - mini PCIe slot near SOM */
|
||||
&cp0_pcie1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
num-lanes = <1>;
|
||||
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* SRDS #5 - mini PCIe slot far from SOM */
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy5 2>;
|
||||
num-lanes = <1>;
|
||||
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* GE PHY RGMII */
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_ge2_rgmii_pins>;
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
nvmem-cells = <&onie_tlv_macaddr 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
/* micro SD card slot */
|
||||
&cp0_sdhci0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
no-1-8-v;
|
||||
vqmmc-supply = <&v_3v3>;
|
||||
vmmc-supply = <&v_3v3>;
|
||||
};
|
||||
|
||||
&cp0_spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi1_pins>;
|
||||
|
||||
spi-flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
|
||||
cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
cp0_sdhci_cd_pins: cp0-sdhci-cd-pins {
|
||||
marvell,pins = "mpp43";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
cp0_sdhci_pins: cp0-sdhci-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58",
|
||||
"mpp59", "mpp60", "mpp61";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
cp0_spi1_pins: cp0-spi1-pins {
|
||||
marvell,pins = "mpp12", "mpp13", "mpp14",
|
||||
"mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
cp0_dsa0_pins: cp0-dsa0-pins {
|
||||
marvell,pins = "mpp27", "mpp29";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_button_pin: cp0-button-pin {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_expander0_pins: cp0-expander0-pins {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
16
target/linux/mvebu/image/clearfog-pro.bootscript
Normal file
16
target/linux/mvebu/image/clearfog-pro.bootscript
Normal file
@ -0,0 +1,16 @@
|
||||
# Standard Boot-Script
|
||||
# use only well-known variable names provided by U-Boot Distro boot
|
||||
# This script assumes the boot partition to be partition 1
|
||||
# and that the root partition is always partition 2.
|
||||
# The vendor u-boot ships without setexpr compiled in.
|
||||
|
||||
# figure out partition uuid to pass to the kernel as root=
|
||||
part uuid ${devtype} ${devnum}:2 uuid
|
||||
|
||||
# generate bootargs (rootfs)
|
||||
setenv bootargs root=PARTUUID=${uuid} rootfstype=auto rootwait
|
||||
|
||||
echo "Booting Linux with ${bootargs}"
|
||||
load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} @DTB@.dtb
|
||||
load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} Image
|
||||
booti ${kernel_addr_r} - ${fdt_addr_r}
|
||||
@ -80,3 +80,13 @@ define Device/iei_puzzle-m902
|
||||
DEVICE_PACKAGES += kmod-rtc-ds1307
|
||||
endef
|
||||
TARGET_DEVICES += iei_puzzle-m902
|
||||
|
||||
define Device/solidrun_clearfog-pro
|
||||
$(call Device/Default-arm64)
|
||||
SOC := cn9130
|
||||
DEVICE_VENDOR := SolidRun
|
||||
DEVICE_MODEL := ClearFog Pro
|
||||
DEVICE_PACKAGES += kmod-i2c-mux-pca954x
|
||||
BOOT_SCRIPT := clearfog-pro
|
||||
endef
|
||||
TARGET_DEVICES += solidrun_clearfog-pro
|
||||
|
||||
@ -18,8 +18,6 @@ Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
|
||||
drivers/cpufreq/armada-8k-cpufreq.c | 16 +++++++++-------
|
||||
1 file changed, 9 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/drivers/cpufreq/armada-8k-cpufreq.c b/drivers/cpufreq/armada-8k-cpufreq.c
|
||||
index b0fc5e84f857..8afefdea4d80 100644
|
||||
--- a/drivers/cpufreq/armada-8k-cpufreq.c
|
||||
+++ b/drivers/cpufreq/armada-8k-cpufreq.c
|
||||
@@ -21,6 +21,13 @@
|
||||
@ -36,7 +34,7 @@ index b0fc5e84f857..8afefdea4d80 100644
|
||||
/*
|
||||
* Setup the opps list with the divider for the max frequency, that
|
||||
* will be filled at runtime.
|
||||
@@ -127,7 +134,8 @@ static int __init armada_8k_cpufreq_init(void)
|
||||
@@ -127,7 +134,8 @@ static int __init armada_8k_cpufreq_init
|
||||
struct device_node *node;
|
||||
struct cpumask cpus;
|
||||
|
||||
@ -46,7 +44,7 @@ index b0fc5e84f857..8afefdea4d80 100644
|
||||
if (!node || !of_device_is_available(node)) {
|
||||
of_node_put(node);
|
||||
return -ENODEV;
|
||||
@@ -204,12 +212,6 @@ static void __exit armada_8k_cpufreq_exit(void)
|
||||
@@ -204,12 +212,6 @@ static void __exit armada_8k_cpufreq_exi
|
||||
}
|
||||
module_exit(armada_8k_cpufreq_exit);
|
||||
|
||||
@ -59,6 +57,3 @@ index b0fc5e84f857..8afefdea4d80 100644
|
||||
MODULE_AUTHOR("Gregory Clement <gregory.clement@bootlin.com>");
|
||||
MODULE_DESCRIPTION("Armada 8K cpufreq driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
--
|
||||
2.43.2
|
||||
|
||||
|
||||
@ -0,0 +1,27 @@
|
||||
From: Tobias Schramm <tobias@t-sys.eu>
|
||||
Subject: mvpp2: support fetching mac address from nvmem
|
||||
|
||||
The mvpp2 driver did not query nvmem for hardware mac addresses. This
|
||||
patch adds querying of mac addresses stored in nvmem cells as a further
|
||||
fallback option before assigning a random address.
|
||||
Purposely added separately to fwnode_get_mac_address() above to maintain
|
||||
existing behaviour with builtin adapter mac address still taking
|
||||
precedence.
|
||||
|
||||
Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
|
||||
---
|
||||
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
|
||||
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
|
||||
@@ -6134,6 +6134,12 @@ static void mvpp2_port_copy_mac_addr(str
|
||||
}
|
||||
}
|
||||
|
||||
+ if (!of_get_mac_address(to_of_node(fwnode), hw_mac_addr)) {
|
||||
+ *mac_from = "nvmem cell";
|
||||
+ eth_hw_addr_set(dev, hw_mac_addr);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
*mac_from = "random";
|
||||
eth_hw_addr_random(dev);
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user