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ath79: update spi-nor patches
Update the 4 bit BP patches for Ubiquiti boards with the second iteration sent upstream. Signed-off-by: David Bauer <mail@david-bauer.net>
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@ -1,26 +0,0 @@
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From 158f9796335b393980afb8e9796eb8d44106652a Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Mon, 26 Oct 2020 15:10:47 +0100
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Subject: [PATCH 1/2] mtd: spi-nor: add block protection flags to macronix
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Macronix flash chips support block protection by using BP bits in the
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read status register. Add the corresponding flag to indicate block
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protection support.
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Otherwise, locked blocks are not unlocked when requested.
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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drivers/mtd/spi-nor/macronix.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/mtd/spi-nor/macronix.c
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+++ b/drivers/mtd/spi-nor/macronix.c
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@@ -94,6 +94,7 @@ static const struct flash_info macronix_
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static void macronix_default_init(struct spi_nor *nor)
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{
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+ nor->flags |= SNOR_F_HAS_LOCK;
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nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
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nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
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nor->flags |= SNOR_F_HAS_LOCK;
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@ -0,0 +1,38 @@
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From a449cd03db4d0e1d292b3734f7676634cfd94f53 Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Sun, 25 Oct 2020 01:14:22 +0200
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Subject: [PATCH] mtd: spi-nor: use 4 bit locking for MX25L12805D
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Macronix MX25L12805D supports locking with 4 block
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protection bits in its status register. Add the corresponding
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flag in order to clear these bits when unloking the flash.
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Otherwise, the flash might not be writable depending on the state
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left by the bootloader.
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Tested-on: Ubiquiti UniFi AC Lite (ath79)
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Fixes commit 62593cf40b23 ("mtd: spi-nor: refactor block protection functions")
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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drivers/mtd/spi-nor/macronix.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
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index 2d39dd32a64e..ed8b56a0102f 100644
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--- a/drivers/mtd/spi-nor/macronix.c
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+++ b/drivers/mtd/spi-nor/macronix.c
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@@ -50,7 +50,8 @@ static const struct flash_info macronix_parts[] = {
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{ "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) },
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{ "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) },
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{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
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- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K) },
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+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K |
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+ SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) },
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{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
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{ "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32,
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SECT_4K | SPI_NOR_DUAL_READ |
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--
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2.31.1
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@ -1,85 +0,0 @@
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From 59f88b8d4447be809d0b5e7a283290d06848d3bc Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Sun, 25 Oct 2020 01:14:22 +0200
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Subject: [PATCH 2/2] mtd: spi-nor: use 4 bit BP for large Macronix flash
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Macronix SPI-NOR chips with 128 or more 64k blocks have 4 block
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protection bits in their status register. Add the corresponding
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flag in order to clear these bits when unloking the flash.
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Otherwise, the flash might not be writable depending on the state the
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bootloader left the flash in.
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Fixes commit 62593cf40b23 ("mtd: spi-nor: refactor block protection functions")
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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drivers/mtd/spi-nor/macronix.c | 31 ++++++++++++++++++-------------
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1 file changed, 18 insertions(+), 13 deletions(-)
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--- a/drivers/mtd/spi-nor/macronix.c
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+++ b/drivers/mtd/spi-nor/macronix.c
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@@ -50,8 +50,8 @@ static const struct flash_info macronix_
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{ "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) },
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{ "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) },
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{ "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) },
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- { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K) },
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- { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
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+ { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_4BIT_BP) },
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+ { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, SPI_NOR_4BIT_BP) },
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{ "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32,
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SECT_4K | SPI_NOR_DUAL_READ |
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SPI_NOR_QUAD_READ) },
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@@ -60,36 +60,41 @@ static const struct flash_info macronix_
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SPI_NOR_QUAD_READ) },
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{ "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256,
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SECT_4K | SPI_NOR_DUAL_READ |
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- SPI_NOR_QUAD_READ) },
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+ SPI_NOR_QUAD_READ | SPI_NOR_4BIT_BP) },
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{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512,
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- SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
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+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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+ SPI_NOR_4BIT_BP)
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.fixups = &mx25l25635_fixups },
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{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512,
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- SECT_4K | SPI_NOR_4B_OPCODES) },
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+ SECT_4K | SPI_NOR_4B_OPCODES |
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+ SPI_NOR_4BIT_BP) },
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{ "mx25u51245g", INFO(0xc2253a, 0, 64 * 1024, 1024,
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SECT_4K | SPI_NOR_DUAL_READ |
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- SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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+ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
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+ SPI_NOR_4BIT_BP) },
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{ "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16,
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SECT_4K | SPI_NOR_DUAL_READ |
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SPI_NOR_QUAD_READ) },
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- { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
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+ { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, SPI_NOR_4BIT_BP) },
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{ "mx25l51245g", INFO(0xc2201a, 0, 64 * 1024, 1024,
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SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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- SPI_NOR_4B_OPCODES) },
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+ SPI_NOR_4B_OPCODES | SPI_NOR_4BIT_BP) },
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{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024,
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SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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- SPI_NOR_4B_OPCODES) },
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+ SPI_NOR_4B_OPCODES | SPI_NOR_4BIT_BP) },
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{ "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024,
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SECT_4K | SPI_NOR_DUAL_READ |
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- SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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+ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
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+ SPI_NOR_4BIT_BP) },
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{ "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048,
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SECT_4K | SPI_NOR_DUAL_READ |
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- SPI_NOR_QUAD_READ) },
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+ SPI_NOR_QUAD_READ | SPI_NOR_4BIT_BP) },
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{ "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048,
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- SPI_NOR_QUAD_READ) },
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+ SPI_NOR_QUAD_READ | SPI_NOR_4BIT_BP) },
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{ "mx66u2g45g", INFO(0xc2253c, 0, 64 * 1024, 4096,
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SECT_4K | SPI_NOR_DUAL_READ |
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- SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
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+ SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
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+ SPI_NOR_4BIT_BP) },
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};
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static void macronix_default_init(struct spi_nor *nor)
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