mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2024-12-29 10:02:23 +00:00
mxs: drop support for 4.9
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
This commit is contained in:
parent
42845f4550
commit
240e1e3fe4
@ -1,296 +0,0 @@
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CONFIG_ALIGNMENT_TRAP=y
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CONFIG_ARCH_CLOCKSOURCE_DATA=y
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CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
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CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
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CONFIG_ARCH_HAS_SG_CHAIN=y
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CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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CONFIG_ARCH_MULTIPLATFORM=y
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CONFIG_ARCH_MULTI_CPU_AUTO=y
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# CONFIG_ARCH_MULTI_V4 is not set
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# CONFIG_ARCH_MULTI_V4T is not set
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CONFIG_ARCH_MULTI_V4_V5=y
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CONFIG_ARCH_MULTI_V5=y
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CONFIG_ARCH_MXS=y
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CONFIG_ARCH_NR_GPIO=0
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# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
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# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
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CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
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CONFIG_ARCH_SUPPORTS_UPROBES=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_USE_BUILTIN_BSWAP=y
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CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
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CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_ARM=y
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CONFIG_ARM_AMBA=y
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CONFIG_ARM_APPENDED_DTB=y
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CONFIG_ARM_ATAG_DTB_COMPAT=y
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# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
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CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
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CONFIG_ARM_CPU_SUSPEND=y
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CONFIG_ARM_HAS_SG_CHAIN=y
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CONFIG_ARM_L1_CACHE_SHIFT=5
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CONFIG_ARM_PATCH_PHYS_VIRT=y
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# CONFIG_ARM_SP805_WATCHDOG is not set
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CONFIG_ARM_THUMB=y
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CONFIG_ATAGS=y
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CONFIG_AUTO_ZRELADDR=y
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# CONFIG_CACHE_L2X0 is not set
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CONFIG_CLKDEV_LOOKUP=y
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CONFIG_CLKSRC_MMIO=y
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CONFIG_CLKSRC_OF=y
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CONFIG_CLKSRC_PROBE=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CMDLINE="console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait"
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CONFIG_CMDLINE_FROM_BOOTLOADER=y
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CONFIG_COMMON_CLK=y
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CONFIG_COREDUMP=y
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CONFIG_CPU_32v5=y
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CONFIG_CPU_ABRT_EV5TJ=y
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CONFIG_CPU_ARM926T=y
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# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
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CONFIG_CPU_CACHE_VIVT=y
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CONFIG_CPU_COPY_V4WB=y
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CONFIG_CPU_CP15=y
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CONFIG_CPU_CP15_MMU=y
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# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
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# CONFIG_CPU_ICACHE_DISABLE is not set
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CONFIG_CPU_IDLE=y
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CONFIG_CPU_IDLE_GOV_LADDER=y
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CONFIG_CPU_IDLE_GOV_MENU=y
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CONFIG_CPU_PABRT_LEGACY=y
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CONFIG_CPU_PM=y
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CONFIG_CPU_TLB_V4WBI=y
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CONFIG_CPU_USE_DOMAINS=y
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CONFIG_CRC16=y
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CONFIG_CROSS_MEMORY_ATTACH=y
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CONFIG_CRYPTO_CBC=y
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CONFIG_CRYPTO_CRC32C=y
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CONFIG_CRYPTO_DEV_MXS_DCP=y
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CONFIG_CRYPTO_ECB=y
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CONFIG_CRYPTO_HASH=y
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CONFIG_CRYPTO_HASH2=y
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CONFIG_CRYPTO_HW=y
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CONFIG_CRYPTO_MANAGER=y
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CONFIG_CRYPTO_MANAGER2=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_WORKQUEUE=y
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CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
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# CONFIG_DEBUG_UART_8250 is not set
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# CONFIG_DEBUG_USER is not set
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CONFIG_DMADEVICES=y
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CONFIG_DMA_ENGINE=y
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CONFIG_DMA_OF=y
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CONFIG_DTC=y
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CONFIG_EDAC_ATOMIC_SCRUB=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_EXT4_FS=y
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CONFIG_EXTCON=y
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CONFIG_FEC=y
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CONFIG_FIXED_PHY=y
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CONFIG_FIX_EARLYCON_MEM=y
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CONFIG_FRAME_POINTER=y
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CONFIG_FS_MBCACHE=y
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CONFIG_GENERIC_ALLOCATOR=y
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_EARLY_IOREMAP=y
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CONFIG_GENERIC_IDLE_POLL_SETUP=y
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_CHIP=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_SCHED_CLOCK=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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# CONFIG_GIANFAR is not set
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_GENERIC=y
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CONFIG_GPIO_GENERIC_PLATFORM=y
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CONFIG_GPIO_MXS=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_HANDLE_DOMAIN_IRQ=y
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CONFIG_HARDIRQS_SW_RESEND=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT_MAP=y
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# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
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CONFIG_HAVE_ARCH_AUDITSYSCALL=y
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# CONFIG_HAVE_ARCH_BITREVERSE is not set
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_PFN_VALID=y
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CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
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CONFIG_HAVE_CBPF_JIT=y
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CONFIG_HAVE_CC_STACKPROTECTOR=y
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CONFIG_HAVE_CLK=y
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CONFIG_HAVE_CLK_PREPARE=y
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CONFIG_HAVE_CONTEXT_TRACKING=y
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CONFIG_HAVE_C_RECORDMCOUNT=y
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CONFIG_HAVE_DEBUG_KMEMLEAK=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DMA_CONTIGUOUS=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_NET_DSA=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_OPTPROBES=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_PERF_REGS=y
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CONFIG_HAVE_PERF_USER_STACK_DUMP=y
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CONFIG_HAVE_PROC_CPU=y
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CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
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CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
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CONFIG_HAVE_UID16=y
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CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
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CONFIG_HZ_FIXED=0
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CONFIG_HZ_PERIODIC=y
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CONFIG_I2C=y
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CONFIG_I2C_ALGOBIT=y
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CONFIG_I2C_ALGOPCA=y
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CONFIG_I2C_ALGOPCF=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_COMPAT=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PINCTRL=y
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CONFIG_I2C_MXS=y
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CONFIG_IIO=y
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CONFIG_IIO_BUFFER=y
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CONFIG_IIO_KFIFO_BUF=y
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CONFIG_IIO_SYSFS_TRIGGER=y
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CONFIG_IIO_TRIGGER=y
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CONFIG_IIO_TRIGGERED_BUFFER=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_INPUT=y
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CONFIG_IOMMU_HELPER=y
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_MXS=y
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CONFIG_IRQ_WORK=y
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# CONFIG_ISDN is not set
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CONFIG_JBD2=y
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CONFIG_LIBFDT=y
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MIGHT_HAVE_PCI=y
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CONFIG_MMC=y
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CONFIG_MMC_BLOCK=y
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CONFIG_MMC_MXS=y
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CONFIG_MODULES_USE_ELF_REL=y
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# CONFIG_MTD_PHYSMAP_OF is not set
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CONFIG_MULTI_IRQ_HANDLER=y
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CONFIG_MXS_DMA=y
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CONFIG_MXS_LRADC=y
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CONFIG_MXS_TIMER=y
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CONFIG_NEED_DMA_MAP_STATE=y
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CONFIG_NEED_KUSER_HELPERS=y
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CONFIG_NEED_PER_CPU_KM=y
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CONFIG_NET_PTP_CLASSIFY=y
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CONFIG_NLS=y
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CONFIG_NO_BOOTMEM=y
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CONFIG_NVMEM=y
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CONFIG_NVMEM_MXS_OCOTP=y
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_MDIO=y
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CONFIG_OF_NET=y
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CONFIG_OF_RESERVED_MEM=y
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CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND3=y
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CONFIG_PAGE_OFFSET=0xC0000000
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# CONFIG_PCI_DOMAINS_GENERIC is not set
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# CONFIG_PCI_SYSCALL is not set
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PGTABLE_LEVELS=2
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CONFIG_PHYLIB=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_IMX23=y
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CONFIG_PINCTRL_IMX28=y
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CONFIG_PINCTRL_MXS=y
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# CONFIG_PINCTRL_SINGLE is not set
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CONFIG_PM=y
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CONFIG_PM_CLK=y
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# CONFIG_PM_DEBUG is not set
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CONFIG_POWER_SUPPLY=y
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CONFIG_PPS=y
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CONFIG_PTP_1588_CLOCK=y
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CONFIG_RATIONAL=y
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# CONFIG_RCU_STALL_COMMON is not set
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CONFIG_REGMAP=y
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CONFIG_REGMAP_I2C=y
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CONFIG_REGMAP_MMIO=y
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CONFIG_REGMAP_SPI=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_REGULATOR_GPIO=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_STMP=y
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CONFIG_RTC_I2C_AND_SPI=y
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CONFIG_RTC_MC146818_LIB=y
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CONFIG_RWSEM_XCHGADD_ALGORITHM=y
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# CONFIG_SCHED_INFO is not set
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# CONFIG_SCSI_DMA is not set
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CONFIG_SERIAL_8250_FSL=y
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CONFIG_SERIAL_AMBA_PL010=y
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CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
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CONFIG_SERIAL_AMBA_PL011=y
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CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
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CONFIG_SERIAL_MCTRL_GPIO=y
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CONFIG_SERIAL_MXS_AUART=y
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CONFIG_SERIAL_MXS_AUART_CONSOLE=y
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CONFIG_SMSC_PHY=y
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CONFIG_SOC_BUS=y
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CONFIG_SOC_IMX23=y
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CONFIG_SOC_IMX28=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_SPI=y
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CONFIG_SPI_MASTER=y
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CONFIG_SPI_MXS=y
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CONFIG_SPLIT_PTLOCK_CPUS=999999
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CONFIG_SRCU=y
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CONFIG_STMP3XXX_RTC_WATCHDOG=y
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CONFIG_STMP_DEVICE=y
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CONFIG_SWIOTLB=y
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CONFIG_SWPHY=y
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CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
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CONFIG_USB=y
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CONFIG_USB_CHIPIDEA=y
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CONFIG_USB_CHIPIDEA_HOST=y
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CONFIG_USB_CHIPIDEA_OF=y
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CONFIG_USB_CHIPIDEA_UDC=y
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CONFIG_USB_COMMON=y
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CONFIG_USB_EHCI_HCD=y
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# CONFIG_USB_EHCI_HCD_PLATFORM is not set
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CONFIG_USB_GADGET=y
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CONFIG_USB_MXS_PHY=y
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CONFIG_USB_OTG=y
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CONFIG_USB_PHY=y
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CONFIG_USB_SUPPORT=y
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CONFIG_USE_OF=y
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CONFIG_VECTORS_BASE=0xffff0000
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# CONFIG_VFP is not set
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CONFIG_WATCHDOG_CORE=y
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CONFIG_XZ_DEC_ARM=y
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CONFIG_XZ_DEC_BCJ=y
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CONFIG_ZBOOT_ROM_BSS=0
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CONFIG_ZBOOT_ROM_TEXT=0
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@ -1,139 +0,0 @@
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/*
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* Copyright (C) 2013-2014 Michael Heimpold <mhei@heimpold.de>
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*
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* The code contained herein is licensed under the GNU General Public
|
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* License. You may obtain a copy of the GNU General Public License
|
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx28.dtsi"
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/ {
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model = "I2SE Duckbill";
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compatible = "i2se,duckbill", "fsl,imx28";
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memory {
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reg = <0x40000000 0x08000000>;
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};
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apb@80000000 {
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apbh@80000000 {
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ssp0: ssp@80010000 {
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compatible = "fsl,imx28-mmc";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_4bit_pins_a
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&mmc0_cd_cfg &mmc0_sck_cfg>;
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bus-width = <4>;
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vmmc-supply = <®_3p3v>;
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status = "okay";
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};
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ssp2: ssp@80014000 {
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#address-cells = <1>;
|
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#size-cells = <0>;
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compatible = "fsl,imx28-spi";
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&spi2_pins_a>;
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status = "okay";
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|
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spidev: spidev@0 {
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compatible = "spidev";
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reg = <0>;
|
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spi-max-frequency = <1000000>;
|
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};
|
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};
|
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|
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pinctrl@80018000 {
|
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pinctrl-names = "default";
|
||||
pinctrl-0 = <&hog_pins_a>;
|
||||
|
||||
hog_pins_a: hog@0 {
|
||||
reg = <0>;
|
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fsl,pinmux-ids = <
|
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MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */
|
||||
>;
|
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fsl,drive-strength = <MXS_DRIVE_4mA>;
|
||||
fsl,voltage = <MXS_VOLTAGE_HIGH>;
|
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fsl,pull-up = <MXS_PULL_DISABLE>;
|
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};
|
||||
|
||||
led_pins_a: led_gpio@0 {
|
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reg = <0>;
|
||||
fsl,pinmux-ids = <
|
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MX28_PAD_AUART1_RX__GPIO_3_4
|
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MX28_PAD_AUART1_TX__GPIO_3_5
|
||||
>;
|
||||
fsl,drive-strength = <MXS_DRIVE_4mA>;
|
||||
fsl,voltage = <MXS_VOLTAGE_HIGH>;
|
||||
fsl,pull-up = <MXS_PULL_DISABLE>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
apbx@80040000 {
|
||||
i2c0: i2c@80058000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
duart: serial@80074000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&duart_pins_a>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usbphy0: usbphy@8007c000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ahb@80080000 {
|
||||
usb0: usb@80080000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mac0: ethernet@800f0000 {
|
||||
phy-mode = "rmii";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mac0_pins_a>;
|
||||
phy-supply = <®_3p3v>;
|
||||
phy-reset-gpios = <&gpio2 7 1>;
|
||||
phy-reset-duration = <100>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
reg_3p3v: 3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pins_a>;
|
||||
|
||||
status {
|
||||
label = "duckbill:green:status";
|
||||
gpios = <&gpio3 5 0>;
|
||||
};
|
||||
|
||||
failure {
|
||||
label = "duckbill:red:status";
|
||||
gpios = <&gpio3 4 0>;
|
||||
};
|
||||
};
|
||||
};
|
@ -1,51 +0,0 @@
|
||||
--- a/drivers/crypto/mxs-dcp.c
|
||||
+++ b/drivers/crypto/mxs-dcp.c
|
||||
@@ -770,6 +770,24 @@ static void dcp_sha_cra_exit(struct cryp
|
||||
{
|
||||
}
|
||||
|
||||
+static int dcp_sha_export(struct ahash_request *req, void *out)
|
||||
+{
|
||||
+ struct dcp_sha_req_ctx *rctx = ahash_request_ctx(req);
|
||||
+
|
||||
+ memcpy(out, rctx, sizeof(struct dcp_sha_req_ctx));
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int dcp_sha_import(struct ahash_request *req, const void *in)
|
||||
+{
|
||||
+ struct dcp_sha_req_ctx *rctx = ahash_request_ctx(req);
|
||||
+
|
||||
+ memcpy(rctx, in, sizeof(struct dcp_sha_req_ctx));
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
/* AES 128 ECB and AES 128 CBC */
|
||||
static struct crypto_alg dcp_aes_algs[] = {
|
||||
{
|
||||
@@ -829,8 +847,11 @@ static struct ahash_alg dcp_sha1_alg = {
|
||||
.final = dcp_sha_final,
|
||||
.finup = dcp_sha_finup,
|
||||
.digest = dcp_sha_digest,
|
||||
+ .import = dcp_sha_import,
|
||||
+ .export = dcp_sha_export,
|
||||
.halg = {
|
||||
.digestsize = SHA1_DIGEST_SIZE,
|
||||
+ .statesize = sizeof(struct dcp_sha_req_ctx),
|
||||
.base = {
|
||||
.cra_name = "sha1",
|
||||
.cra_driver_name = "sha1-dcp",
|
||||
@@ -853,8 +874,11 @@ static struct ahash_alg dcp_sha256_alg =
|
||||
.final = dcp_sha_final,
|
||||
.finup = dcp_sha_finup,
|
||||
.digest = dcp_sha_digest,
|
||||
+ .import = dcp_sha_import,
|
||||
+ .export = dcp_sha_export,
|
||||
.halg = {
|
||||
.digestsize = SHA256_DIGEST_SIZE,
|
||||
+ .statesize = sizeof(struct dcp_sha_req_ctx),
|
||||
.base = {
|
||||
.cra_name = "sha256",
|
||||
.cra_driver_name = "sha256-dcp",
|
Loading…
Reference in New Issue
Block a user