toolchain/gcc: merge pending fix for miscompiled MIPS16 code issue (GCC PR 84790)

Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Felix Fietkau 2018-03-12 10:28:03 +01:00
parent fe98f2679c
commit 16cec7ae67
3 changed files with 22 additions and 2 deletions

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@ -0,0 +1,20 @@
Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
MIPS16 functions have a static assembler prologue which clobbers
registers v0 and v1. Add these register clobbers to function call
instructions.
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3098,6 +3098,12 @@ mips_emit_call_insn (rtx pattern, rtx or
emit_insn (gen_update_got_version ());
}
+ if (TARGET_MIPS16 && TARGET_USE_GOT)
+ {
+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
+ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
+ }
+
if (TARGET_MIPS16
&& TARGET_EXPLICIT_RELOCS
&& TARGET_CALL_CLOBBERED_GP)

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@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -19784,7 +19784,7 @@ mips_option_override (void)
@@ -19790,7 +19790,7 @@ mips_option_override (void)
flag_pcc_struct_return = 0;
/* Decide which rtx_costs structure to use. */

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@ -48,7 +48,7 @@ sellcey@mips.com
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -22561,6 +22561,9 @@ mips_promote_function_mode (const_tree t
@@ -22567,6 +22567,9 @@ mips_promote_function_mode (const_tree t
#undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS
#define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2