mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2024-12-28 17:42:28 +00:00
apm821xx: add linux 4.14 apm821xx patches
This patch updates the apm821xx target to use the 4.14 kernel. 4.14 finally ships with a driver for the WNDR4700's tc654 fan controller. The custom driver is deprecated in favor of the upstream driver and the thermal cooling definitions in the DTS are updated. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This commit is contained in:
Christian Lamparter
Mathias Kresin
parent
9a9c7fb4cf
commit
15faf389ad
372
target/linux/apm821xx/config-4.14
Normal file
372
target/linux/apm821xx/config-4.14
Normal file
@ -0,0 +1,372 @@
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# CONFIG_40x is not set
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CONFIG_44x=y
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CONFIG_460EX=y
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CONFIG_4xx=y
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CONFIG_4xx_SOC=y
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# CONFIG_ADVANCED_OPTIONS is not set
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CONFIG_APM821xx=y
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CONFIG_APOLLO3G=y
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# CONFIG_ARCHES is not set
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CONFIG_ARCH_DMA_ADDR_T_64BIT=y
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CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
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CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
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CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y
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CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
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CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
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CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
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CONFIG_ARCH_HAS_SG_CHAIN=y
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CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
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# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
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CONFIG_ARCH_HAS_WALK_MEMORY=y
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CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_MAY_HAVE_PC_FDC=y
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CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
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CONFIG_ARCH_MMAP_RND_BITS=11
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CONFIG_ARCH_MMAP_RND_BITS_MAX=17
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CONFIG_ARCH_MMAP_RND_BITS_MIN=11
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CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
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CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
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CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
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# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
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CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
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# CONFIG_ARCH_RANDOM is not set
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CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
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CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
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CONFIG_ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT=y
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CONFIG_ARCH_SUPPORTS_UPROBES=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_USE_BUILTIN_BSWAP=y
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# CONFIG_ARCH_WANTS_THP_SWAP is not set
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
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CONFIG_AUDIT_ARCH=y
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# CONFIG_BAMBOO is not set
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CONFIG_BCH=y
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CONFIG_BLK_MQ_PCI=y
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# CONFIG_BLUESTONE is not set
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CONFIG_BOOKE=y
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CONFIG_BOOKE_WDT=y
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# CONFIG_BOUNCE is not set
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CONFIG_BUCKMINSTER=y
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# CONFIG_CANYONLANDS is not set
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_CMDLINE="rootfstype=squashfs noinitrd"
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CONFIG_CMDLINE_BOOL=y
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CONFIG_CONSISTENT_SIZE=0x00200000
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CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
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CONFIG_CPU_BIG_ENDIAN=y
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CONFIG_CRC16=y
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CONFIG_CRYPTO_ACOMP2=y
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CONFIG_CRYPTO_AEAD=y
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CONFIG_CRYPTO_AEAD2=y
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CONFIG_CRYPTO_CCM=y
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CONFIG_CRYPTO_CTR=y
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CONFIG_CRYPTO_DEFLATE=y
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CONFIG_CRYPTO_DEV_PPC4XX=y
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CONFIG_CRYPTO_DRBG=y
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CONFIG_CRYPTO_DRBG_HMAC=y
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CONFIG_CRYPTO_DRBG_MENU=y
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CONFIG_CRYPTO_GCM=y
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CONFIG_CRYPTO_GF128MUL=y
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CONFIG_CRYPTO_GHASH=y
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CONFIG_CRYPTO_HASH=y
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CONFIG_CRYPTO_HASH2=y
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CONFIG_CRYPTO_HMAC=y
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CONFIG_CRYPTO_HW=y
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CONFIG_CRYPTO_JITTERENTROPY=y
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CONFIG_CRYPTO_LZO=y
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CONFIG_CRYPTO_MANAGER=y
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CONFIG_CRYPTO_MANAGER2=y
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CONFIG_CRYPTO_MD5_PPC=y
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CONFIG_CRYPTO_NULL=y
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CONFIG_CRYPTO_NULL2=y
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CONFIG_CRYPTO_RNG=y
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CONFIG_CRYPTO_RNG2=y
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CONFIG_CRYPTO_RNG_DEFAULT=y
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CONFIG_CRYPTO_SEQIV=y
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CONFIG_CRYPTO_SHA1_PPC=y
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CONFIG_CRYPTO_SHA256=y
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CONFIG_CRYPTO_WORKQUEUE=y
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CONFIG_DECOMPRESS_GZIP=y
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# CONFIG_DEFAULT_UIMAGE is not set
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# CONFIG_DMA_NOOP_OPS is not set
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# CONFIG_DMA_VIRT_OPS is not set
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# CONFIG_DRM_LIB_RANDOM is not set
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CONFIG_DTC=y
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# CONFIG_E200 is not set
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CONFIG_EARLY_PRINTK=y
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# CONFIG_EBONY is not set
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CONFIG_EDAC_ATOMIC_SCRUB=y
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CONFIG_EDAC_SUPPORT=y
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# CONFIG_EIGER is not set
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# CONFIG_EPAPR_BOOT is not set
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CONFIG_EXPORTFS=y
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CONFIG_EXTRA_TARGETS="uImage"
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CONFIG_FIXED_PHY=y
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# CONFIG_FORCE_SMP is not set
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CONFIG_FREEZER=y
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# CONFIG_FSL_LBC is not set
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# CONFIG_FSL_ULI1575 is not set
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CONFIG_FUTEX_PI=y
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CONFIG_GENERIC_ATOMIC64=y
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CONFIG_GENERIC_BUG=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_CPU_AUTOPROBE=y
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# CONFIG_GENERIC_CSUM is not set
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
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CONFIG_GENERIC_ISA_DMA=y
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CONFIG_GENERIC_MSI_IRQ=y
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CONFIG_GENERIC_NVRAM=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GENERIC_STRNCPY_FROM_USER=y
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CONFIG_GENERIC_STRNLEN_USER=y
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# CONFIG_GENERIC_TBSYNC is not set
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CONFIG_GENERIC_TIME_VSYSCALL=y
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# CONFIG_GEN_RTC is not set
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# CONFIG_GE_FPGA is not set
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# CONFIG_GLACIER is not set
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_GENERIC=y
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CONFIG_GPIO_GENERIC_PLATFORM=y
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CONFIG_GPIO_SYSFS=y
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# CONFIG_GRO_CELLS is not set
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT_MAP=y
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# CONFIG_HAS_RAPIDIO is not set
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# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
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CONFIG_HAVE_ARCH_AUDITSYSCALL=y
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# CONFIG_HAVE_ARCH_BITREVERSE is not set
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
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CONFIG_HAVE_CBPF_JIT=y
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CONFIG_HAVE_DEBUG_KMEMLEAK=y
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CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
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CONFIG_HAVE_GENERIC_GUP=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_IOREMAP_PROT=y
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CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
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CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
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CONFIG_HAVE_KPROBES_ON_FTRACE=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_NET_DSA=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_PERF_REGS=y
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CONFIG_HAVE_PERF_USER_STACK_DUMP=y
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CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
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# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
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CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
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CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_PPC4XX=y
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CONFIG_HZ=1000
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_1000=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_I2C=y
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CONFIG_I2C_BOARDINFO=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_IBM_IIC=y
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CONFIG_IBM_EMAC=y
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CONFIG_IBM_EMAC_EMAC4=y
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CONFIG_IBM_EMAC_POLL_WEIGHT=32
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CONFIG_IBM_EMAC_RGMII=y
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CONFIG_IBM_EMAC_RXB=128
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CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
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CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0
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CONFIG_IBM_EMAC_TAH=y
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CONFIG_IBM_EMAC_TXB=128
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# CONFIG_ICON is not set
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CONFIG_IKAREM=y
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CONFIG_ILLEGAL_POINTER_VALUE=0
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CONFIG_INITRAMFS_SOURCE=""
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# CONFIG_IOMMU_HELPER is not set
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# CONFIG_IPIC is not set
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_ISA_DMA_API=y
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# CONFIG_JFFS2_FS is not set
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# CONFIG_KATMAI is not set
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CONFIG_KERNEL_GZIP=y
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CONFIG_KERNEL_START=0xc0000000
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CONFIG_LEDS_TRIGGER_MTD=y
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CONFIG_LIBFDT=y
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CONFIG_LOWMEM_SIZE=0x30000000
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CONFIG_LZO_COMPRESS=y
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CONFIG_LZO_DECOMPRESS=y
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# CONFIG_MATH_EMULATION is not set
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CONFIG_MDIO_BUS=y
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CONFIG_MDIO_DEVICE=y
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# CONFIG_MMIO_NVRAM is not set
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CONFIG_MODULES_USE_ELF_RELA=y
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# CONFIG_MPIC is not set
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# CONFIG_MPIC_U3_HT_IRQS is not set
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# CONFIG_MPIC_WEIRD is not set
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CONFIG_MTD_CFI_ADV_OPTIONS=y
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# CONFIG_MTD_CFI_GEOMETRY is not set
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_BCH=y
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CONFIG_MTD_NAND_ECC=y
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CONFIG_MTD_NAND_ECC_BCH=y
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CONFIG_MTD_NAND_ECC_SMC=y
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CONFIG_MTD_NAND_NDFC=y
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# CONFIG_MTD_SPLIT is not set
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# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
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CONFIG_NEED_DMA_MAP_STATE=y
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# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
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CONFIG_NEED_PER_CPU_KM=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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# CONFIG_NONSTATIC_KERNEL is not set
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CONFIG_NOT_COHERENT_CACHE=y
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CONFIG_NO_BOOTMEM=y
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CONFIG_NR_IRQS=512
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_ADDRESS_PCI=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_MDIO=y
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CONFIG_OF_NET=y
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CONFIG_OF_PCI=y
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CONFIG_OF_PCI_IRQ=y
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CONFIG_OF_RESERVED_MEM=y
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CONFIG_OLD_SIGACTION=y
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CONFIG_OLD_SIGSUSPEND=y
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CONFIG_PAGE_OFFSET=0xc0000000
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CONFIG_PCI=y
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CONFIG_PCIEAER=y
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CONFIG_PCIEPORTBUS=y
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CONFIG_PCIE_PME=y
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CONFIG_PCI_BUS_ADDR_T_64BIT=y
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CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PCI_MSI=y
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# CONFIG_PCI_MSI_IRQ_DOMAIN is not set
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CONFIG_PGTABLE_LEVELS=2
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CONFIG_PHYLIB=y
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CONFIG_PHYSICAL_START=0x00000000
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CONFIG_PHYS_64BIT=y
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CONFIG_PHYS_ADDR_T_64BIT=y
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CONFIG_PM=y
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CONFIG_PM_AUTOSLEEP=y
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# CONFIG_PM_DEBUG is not set
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CONFIG_PM_SLEEP=y
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CONFIG_PM_WAKELOCKS=y
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CONFIG_PM_WAKELOCKS_GC=y
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CONFIG_PM_WAKELOCKS_LIMIT=100
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CONFIG_PPC=y
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CONFIG_PPC32=y
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CONFIG_PPC44x_SIMPLE=y
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CONFIG_PPC4xx_CPM=y
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CONFIG_PPC4xx_GPIO=y
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# CONFIG_PPC4xx_HSTA_MSI is not set
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CONFIG_PPC4xx_MSI=y
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CONFIG_PPC4xx_OCM=y
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CONFIG_PPC4xx_PCI_EXPRESS=y
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# CONFIG_PPC64 is not set
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# CONFIG_PPC_47x is not set
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# CONFIG_PPC_85xx is not set
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# CONFIG_PPC_8xx is not set
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# CONFIG_PPC_970_NAP is not set
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CONFIG_PPC_ADV_DEBUG_DACS=2
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CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y
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CONFIG_PPC_ADV_DEBUG_DVCS=2
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CONFIG_PPC_ADV_DEBUG_IACS=4
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CONFIG_PPC_ADV_DEBUG_REGS=y
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# CONFIG_PPC_BOOK3S_32 is not set
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# CONFIG_PPC_CELL is not set
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# CONFIG_PPC_CELL_NATIVE is not set
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# CONFIG_PPC_COPRO_BASE is not set
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CONFIG_PPC_DCR=y
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# CONFIG_PPC_DCR_MMIO is not set
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CONFIG_PPC_DCR_NATIVE=y
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# CONFIG_PPC_DOORBELL is not set
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# CONFIG_PPC_EARLY_DEBUG is not set
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# CONFIG_PPC_EPAPR_HV_PIC is not set
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CONFIG_PPC_FPU=y
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# CONFIG_PPC_I8259 is not set
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# CONFIG_PPC_ICP_HV is not set
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# CONFIG_PPC_ICP_NATIVE is not set
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# CONFIG_PPC_ICS_RTAS is not set
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CONFIG_PPC_INDIRECT_PCI=y
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CONFIG_PPC_LIB_RHEAP=y
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CONFIG_PPC_MMU_NOHASH=y
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# CONFIG_PPC_MM_SLICES is not set
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# CONFIG_PPC_MPC106 is not set
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CONFIG_PPC_MSI_BITMAP=y
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# CONFIG_PPC_P7_NAP is not set
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CONFIG_PPC_PCI_CHOICE=y
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# CONFIG_PPC_PTDUMP is not set
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# CONFIG_PPC_RTAS is not set
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CONFIG_PPC_UDBG_16550=y
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CONFIG_PPC_WERROR=y
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# CONFIG_PPC_XICS is not set
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# CONFIG_PPC_XIVE is not set
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# CONFIG_PPC_XIVE_SPAPR is not set
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# CONFIG_PQ2ADS is not set
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CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
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CONFIG_PTE_64BIT=y
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# CONFIG_RAINIER is not set
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CONFIG_RAS=y
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# CONFIG_RCU_NEED_SEGCBLIST is not set
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# CONFIG_RCU_STALL_COMMON is not set
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CONFIG_RD_GZIP=y
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CONFIG_RWSEM_XCHGADD_ALGORITHM=y
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# CONFIG_SAM440EP is not set
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# CONFIG_SCHED_INFO is not set
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# CONFIG_SCSI_DMA is not set
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# CONFIG_SEQUOIA is not set
|
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CONFIG_SERIAL_8250_EXTENDED=y
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CONFIG_SERIAL_8250_FSL=y
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CONFIG_SERIAL_8250_SHARE_IRQ=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SIMPLE_GPIO=y
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CONFIG_SPARSE_IRQ=y
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CONFIG_SRCU=y
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CONFIG_SUSPEND=y
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CONFIG_SUSPEND_FREEZER=y
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# CONFIG_SWIOTLB is not set
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CONFIG_SWPHY=y
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CONFIG_SYSCTL_EXCEPTION_TRACE=y
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# CONFIG_TAISHAN is not set
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CONFIG_TASK_SIZE=0xc0000000
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CONFIG_THIN_ARCHIVES=y
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CONFIG_THREAD_SHIFT=13
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TINY_SRCU=y
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CONFIG_USB_SUPPORT=y
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CONFIG_VDSO32=y
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# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
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# CONFIG_WARP is not set
|
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CONFIG_WATCHDOG_CORE=y
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CONFIG_WNDR4700=y
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# CONFIG_XILINX_SYSACE is not set
|
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# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
|
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CONFIG_XZ_DEC_BCJ=y
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CONFIG_XZ_DEC_POWERPC=y
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# CONFIG_YOSEMITE is not set
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||||
CONFIG_ZLIB_DEFLATE=y
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CONFIG_ZLIB_INFLATE=y
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@ -99,17 +99,17 @@
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map1 {
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trip = <&cpu_alert1>;
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cooling-device = <&fan0 1 87>;
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cooling-device = <&fan0 1 76>;
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};
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map2 {
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trip = <&cpu_alert2>;
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cooling-device = <&fan0 88 100>;
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cooling-device = <&fan0 77 101>;
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};
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map3 {
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trip = <&cpu_alert3>;
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cooling-device = <&fan0 101 147>;
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||||
cooling-device = <&fan0 102 147>;
|
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};
|
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map4 {
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@ -9,6 +9,7 @@ CONFIG_IKAREM=y
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CONFIG_ATA=y
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CONFIG_ATA_SFF=y
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CONFIG_ATA_BMDMA=y
|
||||
# CONFIG_PCI_DISABLE_COMMON_QUIRKS is not set
|
||||
CONFIG_SATA_PMP=y
|
||||
CONFIG_GENERIC_PHY=y
|
||||
CONFIG_SATA_DWC=y
|
||||
@ -22,6 +23,7 @@ CONFIG_LEDS_TRIGGER_DISK=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_M48T86=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_HWMON=y
|
||||
@ -36,6 +38,7 @@ CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_USB_PCI=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_SENSORS_TC654=y
|
||||
CONFIG_SWCONFIG=y
|
||||
|
||||
@ -0,0 +1,32 @@
|
||||
--- a/arch/powerpc/platforms/44x/Kconfig
|
||||
+++ b/arch/powerpc/platforms/44x/Kconfig
|
||||
@@ -41,6 +41,19 @@ config EBONY
|
||||
help
|
||||
This option enables support for the IBM PPC440GP evaluation board.
|
||||
|
||||
+config IKAREM
|
||||
+ bool "Ikarem"
|
||||
+ depends on 44x
|
||||
+ default n
|
||||
+ select PPC44x_SIMPLE
|
||||
+ select APM821xx
|
||||
+ select PCI_MSI
|
||||
+ select PPC4xx_MSI
|
||||
+ select PPC4xx_PCI_EXPRESS
|
||||
+ select IBM_EMAC_RGMII
|
||||
+ help
|
||||
+ This option enables support for the Cisco Meraki MR24 (Ikarem) Access Point.
|
||||
+
|
||||
config SAM440EP
|
||||
bool "Sam440ep"
|
||||
depends on 44x
|
||||
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
@@ -62,6 +62,7 @@ static char *board[] __initdata = {
|
||||
"amcc,sequoia",
|
||||
"amcc,taishan",
|
||||
"amcc,yosemite",
|
||||
+ "meraki,ikarem",
|
||||
"mosaixtech,icon"
|
||||
};
|
||||
|
||||
@ -0,0 +1,30 @@
|
||||
--- a/arch/powerpc/platforms/44x/Kconfig
|
||||
+++ b/arch/powerpc/platforms/44x/Kconfig
|
||||
@@ -144,6 +144,17 @@ config CANYONLANDS
|
||||
help
|
||||
This option enables support for the AMCC PPC460EX evaluation board.
|
||||
|
||||
+config APOLLO3G
|
||||
+ bool "Apollo3G"
|
||||
+ depends on 44x
|
||||
+ default n
|
||||
+ select PPC44x_SIMPLE
|
||||
+ select APM821xx
|
||||
+ select IBM_EMAC_RGMII
|
||||
+ select 460EX
|
||||
+ help
|
||||
+ This option enables support for the AMCC Apollo 3G board.
|
||||
+
|
||||
config GLACIER
|
||||
bool "Glacier"
|
||||
depends on 44x
|
||||
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
@@ -50,6 +50,7 @@ machine_device_initcall(ppc44x_simple, p
|
||||
* board.c file for it rather than adding it to this list.
|
||||
*/
|
||||
static char *board[] __initdata = {
|
||||
+ "amcc,apollo3g",
|
||||
"amcc,arches",
|
||||
"amcc,bamboo",
|
||||
"apm,bluestone",
|
||||
@ -0,0 +1,32 @@
|
||||
--- a/arch/powerpc/platforms/44x/Makefile
|
||||
+++ b/arch/powerpc/platforms/44x/Makefile
|
||||
@@ -4,6 +4,7 @@ ifneq ($(CONFIG_PPC4xx_CPM),y)
|
||||
obj-y += idle.o
|
||||
endif
|
||||
obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
|
||||
+obj-$(CONFIG_WNDR4700) += wndr4700.o
|
||||
obj-$(CONFIG_EBONY) += ebony.o
|
||||
obj-$(CONFIG_SAM440EP) += sam440ep.o
|
||||
obj-$(CONFIG_WARP) += warp.o
|
||||
--- a/arch/powerpc/platforms/44x/Kconfig
|
||||
+++ b/arch/powerpc/platforms/44x/Kconfig
|
||||
@@ -273,6 +273,19 @@ config ICON
|
||||
help
|
||||
This option enables support for the AMCC PPC440SPe evaluation board.
|
||||
|
||||
+config WNDR4700
|
||||
+ bool "WNDR4700"
|
||||
+ depends on 44x
|
||||
+ default n
|
||||
+ select APM821xx
|
||||
+ select PCI_MSI
|
||||
+ select PPC4xx_MSI
|
||||
+ select PPC4xx_PCI_EXPRESS
|
||||
+ select IBM_EMAC_RGMII
|
||||
+ select 460EX
|
||||
+ help
|
||||
+ This option enables support for the Netgear WNDR4700/WNDR4720 board.
|
||||
+
|
||||
config XILINX_VIRTEX440_GENERIC_BOARD
|
||||
bool "Generic Xilinx Virtex 5 FXT board support"
|
||||
depends on 44x
|
||||
@ -0,0 +1,32 @@
|
||||
--- a/arch/powerpc/platforms/44x/Kconfig
|
||||
+++ b/arch/powerpc/platforms/44x/Kconfig
|
||||
@@ -31,6 +31,19 @@ config BLUESTONE
|
||||
help
|
||||
This option enables support for the APM APM821xx Evaluation board.
|
||||
|
||||
+config BUCKMINSTER
|
||||
+ bool "Buckminster"
|
||||
+ depends on 44x
|
||||
+ default n
|
||||
+ select APM821xx
|
||||
+ select PCI_MSI
|
||||
+ select PPC4xx_MSI
|
||||
+ select PPC4xx_PCI_EXPRESS
|
||||
+ select IBM_EMAC_RGMII
|
||||
+ select 460EX
|
||||
+ help
|
||||
+ This option enables support for the Cisco Meraki MX60/MX60W (Buckminster) Security Appliance
|
||||
+
|
||||
config EBONY
|
||||
bool "Ebony"
|
||||
depends on 44x
|
||||
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
|
||||
@@ -63,6 +63,7 @@ static char *board[] __initdata = {
|
||||
"amcc,sequoia",
|
||||
"amcc,taishan",
|
||||
"amcc,yosemite",
|
||||
+ "meraki,buckminster",
|
||||
"meraki,ikarem",
|
||||
"mosaixtech,icon"
|
||||
};
|
||||
@ -0,0 +1,51 @@
|
||||
--- a/arch/powerpc/platforms/4xx/pci.c
|
||||
+++ b/arch/powerpc/platforms/4xx/pci.c
|
||||
@@ -1060,15 +1060,24 @@ static int __init apm821xx_pciex_init_po
|
||||
u32 val;
|
||||
|
||||
/*
|
||||
- * Do a software reset on PCIe ports.
|
||||
- * This code is to fix the issue that pci drivers doesn't re-assign
|
||||
- * bus number for PCIE devices after Uboot
|
||||
- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
|
||||
- * PT quad port, SAS LSI 1064E)
|
||||
+ * Only reset the PHY when no link is currently established.
|
||||
+ * This is for the Atheros PCIe board which has problems to establish
|
||||
+ * the link (again) after this PHY reset. All other currently tested
|
||||
+ * PCIe boards don't show this problem.
|
||||
*/
|
||||
-
|
||||
- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
|
||||
- mdelay(10);
|
||||
+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
|
||||
+ if (!(val & 0x00001000)) {
|
||||
+ /*
|
||||
+ * Do a software reset on PCIe ports.
|
||||
+ * This code is to fix the issue that pci drivers doesn't re-assign
|
||||
+ * bus number for PCIE devices after Uboot
|
||||
+ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
|
||||
+ * PT quad port, SAS LSI 1064E)
|
||||
+ */
|
||||
+
|
||||
+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
|
||||
+ mdelay(10);
|
||||
+ }
|
||||
|
||||
if (port->endpoint)
|
||||
val = PTYPE_LEGACY_ENDPOINT << 20;
|
||||
@@ -1085,9 +1094,12 @@ static int __init apm821xx_pciex_init_po
|
||||
mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
|
||||
mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
|
||||
|
||||
- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
|
||||
- mdelay(50);
|
||||
- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
|
||||
+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
|
||||
+ if (!(val & 0x00001000)) {
|
||||
+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
|
||||
+ mdelay(50);
|
||||
+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
|
||||
+ }
|
||||
|
||||
mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET,
|
||||
mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) |
|
||||
@ -0,0 +1,14 @@
|
||||
--- a/arch/powerpc/platforms/4xx/pci.c
|
||||
+++ b/arch/powerpc/platforms/4xx/pci.c
|
||||
@@ -1905,9 +1905,9 @@ static void __init ppc4xx_configure_pcie
|
||||
* if it works
|
||||
*/
|
||||
out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
|
||||
- out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
|
||||
+ out_le32(mbase + PECFG_PIM0LAH, 0x00000008);
|
||||
out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
|
||||
- out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
|
||||
+ out_le32(mbase + PECFG_PIM1LAH, 0x0000000c);
|
||||
out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
|
||||
out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
|
||||
|
||||
@ -0,0 +1,51 @@
|
||||
--- a/drivers/net/ethernet/ibm/emac/core.c
|
||||
+++ b/drivers/net/ethernet/ibm/emac/core.c
|
||||
@@ -130,6 +130,7 @@ static inline void emac_report_timeout_e
|
||||
{
|
||||
if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX |
|
||||
EMAC_FTR_460EX_PHY_CLK_FIX |
|
||||
+ EMAC_FTR_APM821XX_PHY_CLK_FIX |
|
||||
EMAC_FTR_440EP_PHY_CLK_FIX))
|
||||
DBG(dev, "%s" NL, error);
|
||||
else if (net_ratelimit())
|
||||
@@ -146,6 +147,10 @@ static inline void emac_rx_clk_tx(struct
|
||||
if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
|
||||
dcri_clrset(SDR0, SDR0_MFR,
|
||||
0, SDR0_MFR_ECS >> dev->cell_index);
|
||||
+
|
||||
+ if (emac_has_feature(dev, EMAC_FTR_APM821XX_PHY_CLK_FIX))
|
||||
+ dcri_clrset(SDR0, SDR0_ETH_CFG,
|
||||
+ 0, 0x00000100 >> dev->cell_index);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -155,6 +160,10 @@ static inline void emac_rx_clk_default(s
|
||||
if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
|
||||
dcri_clrset(SDR0, SDR0_MFR,
|
||||
SDR0_MFR_ECS >> dev->cell_index, 0);
|
||||
+
|
||||
+ if (emac_has_feature(dev, EMAC_FTR_APM821XX_PHY_CLK_FIX))
|
||||
+ dcri_clrset(SDR0, SDR0_ETH_CFG,
|
||||
+ 0x00000100 >> dev->cell_index, 0);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -2879,6 +2888,7 @@ static int emac_init_config(struct emac_
|
||||
if (of_device_is_compatible(np, "ibm,emac-apm821xx")) {
|
||||
dev->features |= (EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE |
|
||||
EMAC_FTR_APM821XX_NO_HALF_DUPLEX |
|
||||
+ EMAC_FTR_APM821XX_PHY_CLK_FIX |
|
||||
EMAC_FTR_460EX_PHY_CLK_FIX);
|
||||
}
|
||||
} else if (of_device_is_compatible(np, "ibm,emac4")) {
|
||||
--- a/drivers/net/ethernet/ibm/emac/core.h
|
||||
+++ b/drivers/net/ethernet/ibm/emac/core.h
|
||||
@@ -335,6 +335,8 @@ struct emac_instance {
|
||||
*/
|
||||
#define EMAC_FTR_APM821XX_NO_HALF_DUPLEX 0x00001000
|
||||
|
||||
+#define EMAC_FTR_APM821XX_PHY_CLK_FIX 0x000002000
|
||||
+
|
||||
/* Right now, we don't quite handle the always/possible masks on the
|
||||
* most optimal way as we don't have a way to say something like
|
||||
* always EMAC4. Patches welcome.
|
||||
@ -0,0 +1,545 @@
|
||||
From 419992bae5aaa4e06402e0b7c79fcf7bcb6b4764 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Lamparter <chunkeey@googlemail.com>
|
||||
Date: Thu, 2 Jun 2016 00:48:46 +0200
|
||||
Subject: [PATCH] usb: xhci: add firmware loader for uPD720201 and uPD720202
|
||||
w/o ROM
|
||||
|
||||
This patch adds a firmware loader for the uPD720201K8-711-BAC-A
|
||||
and uPD720202K8-711-BAA-A variant. Both of these chips are listed
|
||||
in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as
|
||||
devices which need the firmware loader on page 2 in order to
|
||||
work as they "do not support the External ROM".
|
||||
|
||||
The "Firmware Download Sequence" is describe in chapter
|
||||
"7.1 FW Download Interface" R19UH0078EJ0500 Rev.5.00 page 131.
|
||||
|
||||
The firmware "K2013080.mem" is available from a USB3.0 Host to
|
||||
PCIe Adapter (PP2U-E card) "Firmware download" archive. An
|
||||
alternative version can be sourced from Netgear's WNDR4700 GPL
|
||||
archives.
|
||||
|
||||
The release notes of the PP2U-E's "Firmware Download" ver 2.0.1.3
|
||||
(2012-06-15) state that the firmware is for the following devices:
|
||||
- uPD720201 ES 2.0 sample whose revision ID is 2.
|
||||
- uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3.
|
||||
- uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2.
|
||||
|
||||
If someone from Renesas is listening: It would be great, if these
|
||||
firmwares could be added to linux-firmware.git.
|
||||
|
||||
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
|
||||
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
|
||||
---
|
||||
drivers/usb/host/xhci-pci.c | 492 ++++++++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 492 insertions(+)
|
||||
|
||||
--- a/drivers/usb/host/xhci-pci.c
|
||||
+++ b/drivers/usb/host/xhci-pci.c
|
||||
@@ -24,6 +24,8 @@
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/acpi.h>
|
||||
+#include <linux/firmware.h>
|
||||
+#include <asm/unaligned.h>
|
||||
|
||||
#include "xhci.h"
|
||||
#include "xhci-trace.h"
|
||||
@@ -238,6 +240,458 @@ static void xhci_pme_acpi_rtd3_enable(st
|
||||
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
|
||||
#endif /* CONFIG_ACPI */
|
||||
|
||||
+static const struct renesas_fw_entry {
|
||||
+ const char *firmware_name;
|
||||
+ u16 device;
|
||||
+ u8 revision;
|
||||
+ u16 expected_version;
|
||||
+} renesas_fw_table[] = {
|
||||
+ /*
|
||||
+ * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A
|
||||
+ * are listed in R19UH0078EJ0500 Rev.5.00 as devices which
|
||||
+ * need the software loader.
|
||||
+ *
|
||||
+ * PP2U/ReleaseNote_USB3-201-202-FW.txt:
|
||||
+ *
|
||||
+ * Note: This firmware is for the following devices.
|
||||
+ * - uPD720201 ES 2.0 sample whose revision ID is 2.
|
||||
+ * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3.
|
||||
+ * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2.
|
||||
+ */
|
||||
+ { "K2013080.mem", 0x0014, 0x02, 0x2013 },
|
||||
+ { "K2013080.mem", 0x0014, 0x03, 0x2013 },
|
||||
+ { "K2013080.mem", 0x0015, 0x02, 0x2013 },
|
||||
+};
|
||||
+
|
||||
+static const struct renesas_fw_entry *renesas_needs_fw_dl(struct pci_dev *dev)
|
||||
+{
|
||||
+ const struct renesas_fw_entry *entry;
|
||||
+ size_t i;
|
||||
+
|
||||
+ /* This loader will only work with a RENESAS device. */
|
||||
+ if (!(dev->vendor == PCI_VENDOR_ID_RENESAS))
|
||||
+ return NULL;
|
||||
+
|
||||
+ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) {
|
||||
+ entry = &renesas_fw_table[i];
|
||||
+ if (entry->device == dev->device &&
|
||||
+ entry->revision == dev->revision)
|
||||
+ return entry;
|
||||
+ }
|
||||
+
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+static int renesas_fw_download_image(struct pci_dev *dev,
|
||||
+ const u32 *fw,
|
||||
+ size_t step)
|
||||
+{
|
||||
+ size_t i;
|
||||
+ int err;
|
||||
+ u8 fw_status;
|
||||
+ bool data0_or_data1;
|
||||
+
|
||||
+ /*
|
||||
+ * The hardware does alternate between two 32-bit pages.
|
||||
+ * (This is because each row of the firmware is 8 bytes).
|
||||
+ *
|
||||
+ * for even steps we use DATA0, for odd steps DATA1.
|
||||
+ */
|
||||
+ data0_or_data1 = (step & 1) == 1;
|
||||
+
|
||||
+ /* step+1. Read "Set DATAX" and confirm it is cleared. */
|
||||
+ for (i = 0; i < 10000; i++) {
|
||||
+ err = pci_read_config_byte(dev, 0xF5, &fw_status);
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+ if (!(fw_status & BIT(data0_or_data1)))
|
||||
+ break;
|
||||
+
|
||||
+ udelay(1);
|
||||
+ }
|
||||
+ if (i == 10000)
|
||||
+ return -ETIMEDOUT;
|
||||
+
|
||||
+ /*
|
||||
+ * step+2. Write FW data to "DATAX".
|
||||
+ * "LSB is left" => force little endian
|
||||
+ */
|
||||
+ err = pci_write_config_dword(dev, data0_or_data1 ? 0xFC : 0xF8,
|
||||
+ (__force u32) cpu_to_le32(fw[step]));
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+
|
||||
+ udelay(100);
|
||||
+
|
||||
+ /* step+3. Set "Set DATAX". */
|
||||
+ err = pci_write_config_byte(dev, 0xF5, BIT(data0_or_data1));
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int renesas_fw_verify(struct pci_dev *dev,
|
||||
+ const void *fw_data,
|
||||
+ size_t length)
|
||||
+{
|
||||
+ const struct renesas_fw_entry *entry = renesas_needs_fw_dl(dev);
|
||||
+ u16 fw_version_pointer;
|
||||
+ u16 fw_version;
|
||||
+
|
||||
+ if (!entry)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ /*
|
||||
+ * The Firmware's Data Format is describe in
|
||||
+ * "6.3 Data Format" R19UH0078EJ0500 Rev.5.00 page 124
|
||||
+ */
|
||||
+
|
||||
+ /* "Each row is 8 bytes". => firmware size must be a multiple of 8. */
|
||||
+ if (length % 8 != 0) {
|
||||
+ dev_err(&dev->dev, "firmware size is not a multipe of 8.");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * The bootrom chips of the big brother have sizes up to 64k, let's
|
||||
+ * assume that's the biggest the firmware can get.
|
||||
+ */
|
||||
+ if (length < 0x1000 || length >= 0x10000) {
|
||||
+ dev_err(&dev->dev, "firmware is size %zd is not (4k - 64k).",
|
||||
+ length);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ /* The First 2 bytes are fixed value (55aa). "LSB on Left" */
|
||||
+ if (get_unaligned_le16(fw_data) != 0x55aa) {
|
||||
+ dev_err(&dev->dev, "no valid firmware header found.");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ /* verify the firmware version position and print it. */
|
||||
+ fw_version_pointer = get_unaligned_le16(fw_data + 4);
|
||||
+ if (fw_version_pointer + 2 >= length) {
|
||||
+ dev_err(&dev->dev, "firmware version pointer is outside of the firmware image.");
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ fw_version = get_unaligned_le16(fw_data + fw_version_pointer);
|
||||
+ dev_dbg(&dev->dev, "got firmware version: %02x.", fw_version);
|
||||
+
|
||||
+ if (fw_version != entry->expected_version) {
|
||||
+ dev_err(&dev->dev, "firmware version mismatch, expected version: %02x.",
|
||||
+ entry->expected_version);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int renesas_fw_check_running(struct pci_dev *pdev)
|
||||
+{
|
||||
+ int err;
|
||||
+ u8 fw_state;
|
||||
+
|
||||
+ /*
|
||||
+ * Test if the device is actually needing the firmware. As most
|
||||
+ * BIOSes will initialize the device for us. If the device is
|
||||
+ * initialized.
|
||||
+ */
|
||||
+ err = pci_read_config_byte(pdev, 0xF4, &fw_state);
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+
|
||||
+ /*
|
||||
+ * Check if "FW Download Lock" is locked. If it is and the FW is
|
||||
+ * ready we can simply continue. If the FW is not ready, we have
|
||||
+ * to give up.
|
||||
+ */
|
||||
+ if (fw_state & BIT(1)) {
|
||||
+ dev_dbg(&pdev->dev, "FW Download Lock is engaged.");
|
||||
+
|
||||
+ if (fw_state & BIT(4))
|
||||
+ return 0;
|
||||
+
|
||||
+ dev_err(&pdev->dev, "FW Download Lock is set and FW is not ready. Giving Up.");
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * Check if "FW Download Enable" is set. If someone (us?) tampered
|
||||
+ * with it and it can't be resetted, we have to give up too... and
|
||||
+ * ask for a forgiveness and a reboot.
|
||||
+ */
|
||||
+ if (fw_state & BIT(0)) {
|
||||
+ dev_err(&pdev->dev, "FW Download Enable is stale. Giving Up (poweroff/reboot needed).");
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ /* Otherwise, Check the "Result Code" Bits (6:4) and act accordingly */
|
||||
+ switch ((fw_state & 0x70)) {
|
||||
+ case 0: /* No result yet */
|
||||
+ dev_dbg(&pdev->dev, "FW is not ready/loaded yet.");
|
||||
+
|
||||
+ /* tell the caller, that this device needs the firmware. */
|
||||
+ return 1;
|
||||
+
|
||||
+ case BIT(4): /* Success, device should be working. */
|
||||
+ dev_dbg(&pdev->dev, "FW is ready.");
|
||||
+ return 0;
|
||||
+
|
||||
+ case BIT(5): /* Error State */
|
||||
+ dev_err(&pdev->dev, "hardware is in an error state. Giving up (poweroff/reboot needed).");
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ default: /* All other states are marked as "Reserved states" */
|
||||
+ dev_err(&pdev->dev, "hardware is in an invalid state %x. Giving up (poweroff/reboot needed).",
|
||||
+ (fw_state & 0x70) >> 4);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int renesas_hw_check_run_stop_busy(struct pci_dev *pdev)
|
||||
+{
|
||||
+#if 0
|
||||
+ u32 val;
|
||||
+
|
||||
+ /*
|
||||
+ * 7.1.3 Note 3: "... must not set 'FW Download Enable' when
|
||||
+ * 'RUN/STOP' of USBCMD Register is set"
|
||||
+ */
|
||||
+ val = readl(hcd->regs + 0x20);
|
||||
+ if (val & BIT(0)) {
|
||||
+ dev_err(&pdev->dev, "hardware is busy and can't receive a FW.");
|
||||
+ return -EBUSY;
|
||||
+ }
|
||||
+#endif
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int renesas_fw_download(struct pci_dev *pdev,
|
||||
+ const struct firmware *fw, unsigned int retry_counter)
|
||||
+{
|
||||
+ const u32 *fw_data = (const u32 *) fw->data;
|
||||
+ size_t i;
|
||||
+ int err;
|
||||
+ u8 fw_status;
|
||||
+
|
||||
+ /*
|
||||
+ * For more information and the big picture: please look at the
|
||||
+ * "Firmware Download Sequence" in "7.1 FW Download Interface"
|
||||
+ * of R19UH0078EJ0500 Rev.5.00 page 131
|
||||
+ */
|
||||
+ err = renesas_hw_check_run_stop_busy(pdev);
|
||||
+ if (err)
|
||||
+ return err;
|
||||
+
|
||||
+ /*
|
||||
+ * 0. Set "FW Download Enable" bit in the
|
||||
+ * "FW Download Control & Status Register" at 0xF4
|
||||
+ */
|
||||
+ err = pci_write_config_byte(pdev, 0xF4, BIT(0));
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+
|
||||
+ /* 1 - 10 follow one step after the other. */
|
||||
+ for (i = 0; i < fw->size / 4; i++) {
|
||||
+ err = renesas_fw_download_image(pdev, fw_data, i);
|
||||
+ if (err) {
|
||||
+ dev_err(&pdev->dev, "Firmware Download Step %zd failed at position %zd bytes with (%d).",
|
||||
+ i, i * 4, err);
|
||||
+ return err;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * This sequence continues until the last data is written to
|
||||
+ * "DATA0" or "DATA1". Naturally, we wait until "SET DATA0/1"
|
||||
+ * is cleared by the hardware beforehand.
|
||||
+ */
|
||||
+ for (i = 0; i < 10000; i++) {
|
||||
+ err = pci_read_config_byte(pdev, 0xF5, &fw_status);
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+ if (!(fw_status & (BIT(0) | BIT(1))))
|
||||
+ break;
|
||||
+
|
||||
+ udelay(1);
|
||||
+ }
|
||||
+ if (i == 10000)
|
||||
+ dev_warn(&pdev->dev, "Final Firmware Download step timed out.");
|
||||
+
|
||||
+ /*
|
||||
+ * 11. After finishing writing the last data of FW, the
|
||||
+ * System Software must clear "FW Download Enable"
|
||||
+ */
|
||||
+ err = pci_write_config_byte(pdev, 0xF4, 0);
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+
|
||||
+ /* 12. Read "Result Code" and confirm it is good. */
|
||||
+ for (i = 0; i < 10000; i++) {
|
||||
+ err = pci_read_config_byte(pdev, 0xF4, &fw_status);
|
||||
+ if (err)
|
||||
+ return pcibios_err_to_errno(err);
|
||||
+ if (fw_status & BIT(4))
|
||||
+ break;
|
||||
+
|
||||
+ udelay(1);
|
||||
+ }
|
||||
+ if (i == 10000) {
|
||||
+ /* Timed out / Error - let's see if we can fix this */
|
||||
+ err = renesas_fw_check_running(pdev);
|
||||
+ switch (err) {
|
||||
+ case 0: /*
|
||||
+ * we shouldn't end up here.
|
||||
+ * maybe it took a little bit longer.
|
||||
+ * But all should be well?
|
||||
+ */
|
||||
+ break;
|
||||
+
|
||||
+ case 1: /* (No result yet? - we can try to retry) */
|
||||
+ if (retry_counter < 10) {
|
||||
+ retry_counter++;
|
||||
+ dev_warn(&pdev->dev, "Retry Firmware download: %d try.",
|
||||
+ retry_counter);
|
||||
+ return renesas_fw_download(pdev, fw,
|
||||
+ retry_counter);
|
||||
+ }
|
||||
+ return -ETIMEDOUT;
|
||||
+
|
||||
+ default:
|
||||
+ return err;
|
||||
+ }
|
||||
+ }
|
||||
+ /*
|
||||
+ * Optional last step: Engage Firmware Lock
|
||||
+ *
|
||||
+ * err = pci_write_config_byte(pdev, 0xF4, BIT(2));
|
||||
+ * if (err)
|
||||
+ * return pcibios_err_to_errno(err);
|
||||
+ */
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+struct renesas_fw_ctx {
|
||||
+ struct pci_dev *pdev;
|
||||
+ const struct pci_device_id *id;
|
||||
+ bool resume;
|
||||
+};
|
||||
+
|
||||
+static int xhci_pci_probe(struct pci_dev *pdev,
|
||||
+ const struct pci_device_id *id);
|
||||
+
|
||||
+static void renesas_fw_callback(const struct firmware *fw,
|
||||
+ void *context)
|
||||
+{
|
||||
+ struct renesas_fw_ctx *ctx = context;
|
||||
+ struct pci_dev *pdev = ctx->pdev;
|
||||
+ struct device *parent = pdev->dev.parent;
|
||||
+ int err = -ENOENT;
|
||||
+
|
||||
+ if (fw) {
|
||||
+ err = renesas_fw_verify(pdev, fw->data, fw->size);
|
||||
+ if (!err) {
|
||||
+ err = renesas_fw_download(pdev, fw, 0);
|
||||
+ release_firmware(fw);
|
||||
+ if (!err) {
|
||||
+ if (ctx->resume)
|
||||
+ return;
|
||||
+
|
||||
+ err = xhci_pci_probe(pdev, ctx->id);
|
||||
+ if (!err) {
|
||||
+ /* everything worked */
|
||||
+ devm_kfree(&pdev->dev, ctx);
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ /* in case of an error - fall through */
|
||||
+ } else {
|
||||
+ dev_err(&pdev->dev, "firmware failed to download (%d).",
|
||||
+ err);
|
||||
+ }
|
||||
+ }
|
||||
+ } else {
|
||||
+ dev_err(&pdev->dev, "firmware failed to load (%d).", err);
|
||||
+ }
|
||||
+
|
||||
+ dev_info(&pdev->dev, "Unloading driver");
|
||||
+
|
||||
+ if (parent)
|
||||
+ device_lock(parent);
|
||||
+
|
||||
+ device_release_driver(&pdev->dev);
|
||||
+
|
||||
+ if (parent)
|
||||
+ device_unlock(parent);
|
||||
+
|
||||
+ pci_dev_put(pdev);
|
||||
+}
|
||||
+
|
||||
+static int renesas_fw_alive_check(struct pci_dev *pdev)
|
||||
+{
|
||||
+ const struct renesas_fw_entry *entry;
|
||||
+ int err;
|
||||
+
|
||||
+ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */
|
||||
+ entry = renesas_needs_fw_dl(pdev);
|
||||
+ if (!entry)
|
||||
+ return 0;
|
||||
+
|
||||
+ err = renesas_fw_check_running(pdev);
|
||||
+ /* Also go ahead, if the firmware is running */
|
||||
+ if (err == 0)
|
||||
+ return 0;
|
||||
+
|
||||
+ /* At this point, we can be sure that the FW isn't ready. */
|
||||
+ return err;
|
||||
+}
|
||||
+
|
||||
+static int renesas_fw_download_to_hw(struct pci_dev *pdev,
|
||||
+ const struct pci_device_id *id,
|
||||
+ bool do_resume)
|
||||
+{
|
||||
+ const struct renesas_fw_entry *entry;
|
||||
+ struct renesas_fw_ctx *ctx;
|
||||
+ int err;
|
||||
+
|
||||
+ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */
|
||||
+ entry = renesas_needs_fw_dl(pdev);
|
||||
+ if (!entry)
|
||||
+ return 0;
|
||||
+
|
||||
+ err = renesas_fw_check_running(pdev);
|
||||
+ /* Continue ahead, if the firmware is already running. */
|
||||
+ if (err == 0)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (err != 1)
|
||||
+ return err;
|
||||
+
|
||||
+ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
|
||||
+ if (!ctx)
|
||||
+ return -ENOMEM;
|
||||
+ ctx->pdev = pdev;
|
||||
+ ctx->resume = do_resume;
|
||||
+ ctx->id = id;
|
||||
+
|
||||
+ pci_dev_get(pdev);
|
||||
+ err = request_firmware_nowait(THIS_MODULE, 1, entry->firmware_name,
|
||||
+ &pdev->dev, GFP_KERNEL, ctx, renesas_fw_callback);
|
||||
+ if (err) {
|
||||
+ pci_dev_put(pdev);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ /*
|
||||
+ * The renesas_fw_callback() callback will continue the probe
|
||||
+ * process, once it aquires the firmware.
|
||||
+ */
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
/* called during probe() after chip reset completes */
|
||||
static int xhci_pci_setup(struct usb_hcd *hcd)
|
||||
{
|
||||
@@ -273,6 +727,22 @@ static int xhci_pci_probe(struct pci_dev
|
||||
struct hc_driver *driver;
|
||||
struct usb_hcd *hcd;
|
||||
|
||||
+ /*
|
||||
+ * Check if this device is a RENESAS uPD720201/2 device.
|
||||
+ * Otherwise, we can continue with xhci_pci_probe as usual.
|
||||
+ */
|
||||
+ retval = renesas_fw_download_to_hw(dev, id, false);
|
||||
+ switch (retval) {
|
||||
+ case 0:
|
||||
+ break;
|
||||
+
|
||||
+ case 1: /* let it load the firmware and recontinue the probe. */
|
||||
+ return 0;
|
||||
+
|
||||
+ default:
|
||||
+ return retval;
|
||||
+ };
|
||||
+
|
||||
driver = (struct hc_driver *)id->driver_data;
|
||||
|
||||
/* For some HW implementation, a XHCI reset is just not enough... */
|
||||
@@ -337,6 +807,16 @@ static void xhci_pci_remove(struct pci_d
|
||||
{
|
||||
struct xhci_hcd *xhci;
|
||||
|
||||
+ if (renesas_fw_alive_check(dev)) {
|
||||
+ /*
|
||||
+ * bail out early, if this was a renesas device w/o FW.
|
||||
+ * Else we might hit the NMI watchdog in xhci_handsake
|
||||
+ * during xhci_reset as part of the driver's unloading.
|
||||
+ * which we forced in the renesas_fw_callback().
|
||||
+ */
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
xhci = hcd_to_xhci(pci_get_drvdata(dev));
|
||||
xhci->xhc_state |= XHCI_STATE_REMOVING;
|
||||
if (xhci->shared_hcd) {
|
||||
@ -0,0 +1,54 @@
|
||||
From a0dc613140bab907a3d5787a7ae7b0638bf674d0 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Lamparter <chunkeey@gmail.com>
|
||||
Date: Thu, 23 Jun 2016 20:28:20 +0200
|
||||
Subject: [PATCH] usb: xhci: force MSI for uPD720201 and
|
||||
uPD720202
|
||||
|
||||
The APM82181 does not support MSI-X. When probed, it will
|
||||
produce a noisy warning.
|
||||
|
||||
---
|
||||
drivers/usb/host/pci-quirks.c | 362 ++++++++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 362 insertions(+)
|
||||
|
||||
--- a/drivers/usb/host/xhci-pci.c
|
||||
+++ b/drivers/usb/host/xhci-pci.c
|
||||
@@ -196,7 +196,7 @@ static void xhci_pci_quirks(struct devic
|
||||
xhci->quirks |= XHCI_TRUST_TX_LENGTH;
|
||||
if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
|
||||
pdev->device == 0x0015)
|
||||
- xhci->quirks |= XHCI_RESET_ON_RESUME;
|
||||
+ xhci->quirks |= XHCI_RESET_ON_RESUME | XHCI_FORCE_MSI;
|
||||
if (pdev->vendor == PCI_VENDOR_ID_VIA)
|
||||
xhci->quirks |= XHCI_RESET_ON_RESUME;
|
||||
|
||||
--- a/drivers/usb/host/xhci.c
|
||||
+++ b/drivers/usb/host/xhci.c
|
||||
@@ -357,10 +357,14 @@ static int xhci_try_enable_msi(struct us
|
||||
free_irq(hcd->irq, hcd);
|
||||
hcd->irq = 0;
|
||||
|
||||
- ret = xhci_setup_msix(xhci);
|
||||
- if (ret)
|
||||
- /* fall back to msi*/
|
||||
+ if (xhci->quirks & XHCI_FORCE_MSI) {
|
||||
ret = xhci_setup_msi(xhci);
|
||||
+ } else {
|
||||
+ ret = xhci_setup_msix(xhci);
|
||||
+ if (ret)
|
||||
+ /* fall back to msi*/
|
||||
+ ret = xhci_setup_msi(xhci);
|
||||
+ }
|
||||
|
||||
if (!ret) {
|
||||
hcd->msi_enabled = 1;
|
||||
--- a/drivers/usb/host/xhci.h
|
||||
+++ b/drivers/usb/host/xhci.h
|
||||
@@ -1848,6 +1848,7 @@ struct xhci_hcd {
|
||||
/* support xHCI 0.96 spec USB2 software LPM */
|
||||
unsigned sw_lpm_support:1;
|
||||
/* support xHCI 1.0 spec USB2 hardware LPM */
|
||||
+#define XHCI_FORCE_MSI (1 << 24)
|
||||
unsigned hw_lpm_support:1;
|
||||
/* cached usb2 extened protocol capabilites */
|
||||
u32 *ext_caps;
|
||||
@ -0,0 +1,65 @@
|
||||
From 694f9bfb8efaef8a33e8992015ff9d0866faf4a2 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Lamparter <chunkeey@gmail.com>
|
||||
Date: Sun, 17 Dec 2017 17:27:15 +0100
|
||||
Subject: [PATCH 1/2] hwmon: tc654 add detection routine
|
||||
|
||||
This patch adds a detection routine for the TC654/TC655
|
||||
chips. Both IDs are listed in the Datasheet.
|
||||
|
||||
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
|
||||
---
|
||||
drivers/hwmon/tc654.c | 29 +++++++++++++++++++++++++++++
|
||||
1 file changed, 29 insertions(+)
|
||||
|
||||
--- a/drivers/hwmon/tc654.c
|
||||
+++ b/drivers/hwmon/tc654.c
|
||||
@@ -64,6 +64,11 @@ enum tc654_regs {
|
||||
/* Register data is read (and cached) at most once per second. */
|
||||
#define TC654_UPDATE_INTERVAL HZ
|
||||
|
||||
+/* Manufacturer and Version Identification Register Values */
|
||||
+#define TC654_MFR_ID_MICROCHIP 0x84
|
||||
+#define TC654_VER_ID 0x00
|
||||
+#define TC655_VER_ID 0x01
|
||||
+
|
||||
struct tc654_data {
|
||||
struct i2c_client *client;
|
||||
|
||||
@@ -497,6 +502,29 @@ static const struct i2c_device_id tc654_
|
||||
{}
|
||||
};
|
||||
|
||||
+static int
|
||||
+tc654_detect(struct i2c_client *new_client, struct i2c_board_info *info)
|
||||
+{
|
||||
+ struct i2c_adapter *adapter = new_client->adapter;
|
||||
+ int manufacturer, product;
|
||||
+
|
||||
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ manufacturer = i2c_smbus_read_byte_data(new_client, TC654_REG_MFR_ID);
|
||||
+ if (manufacturer != TC654_MFR_ID_MICROCHIP)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ product = i2c_smbus_read_byte_data(new_client, TC654_REG_VER_ID);
|
||||
+ if (!((product == TC654_VER_ID) || (product == TC655_VER_ID)))
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ strlcpy(info->type, product == TC654_VER_ID ? "tc654" : "tc655",
|
||||
+ I2C_NAME_SIZE);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+
|
||||
MODULE_DEVICE_TABLE(i2c, tc654_id);
|
||||
|
||||
static struct i2c_driver tc654_driver = {
|
||||
@@ -505,6 +533,7 @@ static struct i2c_driver tc654_driver =
|
||||
},
|
||||
.probe = tc654_probe,
|
||||
.id_table = tc654_id,
|
||||
+ .detect = tc654_detect,
|
||||
};
|
||||
|
||||
module_i2c_driver(tc654_driver);
|
||||
@ -0,0 +1,174 @@
|
||||
From 15ae701189744d321d3a1264ff46f8871e8765ee Mon Sep 17 00:00:00 2001
|
||||
From: Christian Lamparter <chunkeey@gmail.com>
|
||||
Date: Sun, 17 Dec 2017 17:29:13 +0100
|
||||
Subject: [PATCH] hwmon: tc654: add thermal_cooling device
|
||||
|
||||
This patch adds a thermaL_cooling device to the tc654 driver.
|
||||
This allows the chip to be used for DT-based cooling.
|
||||
|
||||
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
|
||||
---
|
||||
drivers/hwmon/tc654.c | 103 +++++++++++++++++++++++++++++++++++++++++---------
|
||||
1 file changed, 86 insertions(+), 17 deletions(-)
|
||||
|
||||
--- a/drivers/hwmon/tc654.c
|
||||
+++ b/drivers/hwmon/tc654.c
|
||||
@@ -24,6 +24,7 @@
|
||||
#include <linux/module.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/slab.h>
|
||||
+#include <linux/thermal.h>
|
||||
#include <linux/util_macros.h>
|
||||
|
||||
enum tc654_regs {
|
||||
@@ -141,6 +142,9 @@ struct tc654_data {
|
||||
* writable register used to control the duty
|
||||
* cycle of the V OUT output.
|
||||
*/
|
||||
+
|
||||
+ /* optional cooling device */
|
||||
+ struct thermal_cooling_device *cdev;
|
||||
};
|
||||
|
||||
/* helper to grab and cache data, at most one time per second */
|
||||
@@ -376,36 +380,30 @@ static ssize_t set_pwm_mode(struct devic
|
||||
static const int tc654_pwm_map[16] = { 77, 88, 102, 112, 124, 136, 148, 160,
|
||||
172, 184, 196, 207, 219, 231, 243, 255};
|
||||
|
||||
+static int get_pwm(struct tc654_data *data)
|
||||
+{
|
||||
+ if (data->config & TC654_REG_CONFIG_SDM)
|
||||
+ return 0;
|
||||
+ else
|
||||
+ return tc654_pwm_map[data->duty_cycle];
|
||||
+}
|
||||
+
|
||||
static ssize_t show_pwm(struct device *dev, struct device_attribute *da,
|
||||
char *buf)
|
||||
{
|
||||
struct tc654_data *data = tc654_update_client(dev);
|
||||
- int pwm;
|
||||
|
||||
if (IS_ERR(data))
|
||||
return PTR_ERR(data);
|
||||
|
||||
- if (data->config & TC654_REG_CONFIG_SDM)
|
||||
- pwm = 0;
|
||||
- else
|
||||
- pwm = tc654_pwm_map[data->duty_cycle];
|
||||
-
|
||||
- return sprintf(buf, "%d\n", pwm);
|
||||
+ return sprintf(buf, "%d\n", get_pwm(data));
|
||||
}
|
||||
|
||||
-static ssize_t set_pwm(struct device *dev, struct device_attribute *da,
|
||||
- const char *buf, size_t count)
|
||||
+static int _set_pwm(struct tc654_data *data, unsigned long val)
|
||||
{
|
||||
- struct tc654_data *data = dev_get_drvdata(dev);
|
||||
struct i2c_client *client = data->client;
|
||||
- unsigned long val;
|
||||
int ret;
|
||||
|
||||
- if (kstrtoul(buf, 10, &val))
|
||||
- return -EINVAL;
|
||||
- if (val > 255)
|
||||
- return -EINVAL;
|
||||
-
|
||||
mutex_lock(&data->update_lock);
|
||||
|
||||
if (val == 0)
|
||||
@@ -425,6 +423,22 @@ static ssize_t set_pwm(struct device *de
|
||||
|
||||
out:
|
||||
mutex_unlock(&data->update_lock);
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static ssize_t set_pwm(struct device *dev, struct device_attribute *da,
|
||||
+ const char *buf, size_t count)
|
||||
+{
|
||||
+ struct tc654_data *data = dev_get_drvdata(dev);
|
||||
+ unsigned long val;
|
||||
+ int ret;
|
||||
+
|
||||
+ if (kstrtoul(buf, 10, &val))
|
||||
+ return -EINVAL;
|
||||
+ if (val > 255)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ ret = _set_pwm(data, val);
|
||||
return ret < 0 ? ret : count;
|
||||
}
|
||||
|
||||
@@ -462,6 +476,47 @@ static struct attribute *tc654_attrs[] =
|
||||
|
||||
ATTRIBUTE_GROUPS(tc654);
|
||||
|
||||
+/* cooling device */
|
||||
+
|
||||
+static int tc654_get_max_state(struct thermal_cooling_device *cdev,
|
||||
+ unsigned long *state)
|
||||
+{
|
||||
+ *state = 255;
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int tc654_get_cur_state(struct thermal_cooling_device *cdev,
|
||||
+ unsigned long *state)
|
||||
+{
|
||||
+ struct tc654_data *data = tc654_update_client(cdev->devdata);
|
||||
+
|
||||
+ if (IS_ERR(data))
|
||||
+ return PTR_ERR(data);
|
||||
+
|
||||
+ *state = get_pwm(data);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int tc654_set_cur_state(struct thermal_cooling_device *cdev,
|
||||
+ unsigned long state)
|
||||
+{
|
||||
+ struct tc654_data *data = tc654_update_client(cdev->devdata);
|
||||
+
|
||||
+ if (IS_ERR(data))
|
||||
+ return PTR_ERR(data);
|
||||
+
|
||||
+ if (state > 255)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ return _set_pwm(data, state);
|
||||
+}
|
||||
+
|
||||
+static const struct thermal_cooling_device_ops tc654_fan_cool_ops = {
|
||||
+ .get_max_state = tc654_get_max_state,
|
||||
+ .get_cur_state = tc654_get_cur_state,
|
||||
+ .set_cur_state = tc654_set_cur_state,
|
||||
+};
|
||||
+
|
||||
/*
|
||||
* device probe and removal
|
||||
*/
|
||||
@@ -493,7 +548,21 @@ static int tc654_probe(struct i2c_client
|
||||
hwmon_dev =
|
||||
devm_hwmon_device_register_with_groups(dev, client->name, data,
|
||||
tc654_groups);
|
||||
- return PTR_ERR_OR_ZERO(hwmon_dev);
|
||||
+ if (IS_ERR(hwmon_dev))
|
||||
+ return PTR_ERR(hwmon_dev);
|
||||
+
|
||||
+#if IS_ENABLED(CONFIG_OF)
|
||||
+ /* Optional cooling device register for Device tree platforms */
|
||||
+ data->cdev = thermal_of_cooling_device_register(client->dev.of_node,
|
||||
+ "tc654", hwmon_dev,
|
||||
+ &tc654_fan_cool_ops);
|
||||
+#else /* CONFIG_OF */
|
||||
+ /* Optional cooling device register for non Device tree platforms */
|
||||
+ data->cdev = thermal_cooling_device_register("tc654", hwmon_dev,
|
||||
+ &tc654_fan_cool_ops);
|
||||
+#endif /* CONFIG_OF */
|
||||
+
|
||||
+ return PTR_ERR_OR_ZERO(data->cdev);
|
||||
}
|
||||
|
||||
static const struct i2c_device_id tc654_id[] = {
|
||||
Loading…
Reference in New Issue
Block a user