add another SPI controller driver for the earlier AP83 boards
SVN-Revision: 16315
This commit is contained in:
Gabor Juhos
parent
ce93834602
commit
0755481965
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@ -186,6 +186,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=1
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# CONFIG_SLOW_WORK is not set
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CONFIG_SLUB=y
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CONFIG_SPI=y
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CONFIG_SPI_AP83=y
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CONFIG_SPI_AR71XX=y
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CONFIG_SPI_BITBANG=y
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CONFIG_SPI_GPIO=y
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@ -0,0 +1,282 @@
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/*
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* Atheros AP83 board specific SPI Controller driver
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*
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* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ar71xx/platform.h>
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#define DRV_DESC "Atheros AP83 board SPI Controller driver"
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#define DRV_VERSION "0.1.0"
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#define DRV_NAME "ap83-spi"
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#define AP83_SPI_CLK_HIGH (1 << 23)
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#define AP83_SPI_CLK_LOW 0
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#define AP83_SPI_MOSI_HIGH (1 << 22)
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#define AP83_SPI_MOSI_LOW 0
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#define AP83_SPI_GPIO_CS 1
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#define AP83_SPI_GPIO_MISO 3
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struct ap83_spi {
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struct spi_bitbang bitbang;
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void __iomem *base;
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u32 addr;
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struct platform_device *pdev;
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};
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static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg)
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{
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return __raw_readl(sp->base + reg);
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}
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static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi)
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{
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return spi_master_get_devdata(spi->master);
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}
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static inline void setsck(struct spi_device *spi, int val)
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{
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struct ap83_spi *sp = spidev_to_sp(spi);
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if (val)
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sp->addr |= AP83_SPI_CLK_HIGH;
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else
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sp->addr &= ~AP83_SPI_CLK_HIGH;
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dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n",
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sp->addr, (val) ? "HIGH" : "LOW");
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ap83_spi_rr(sp, sp->addr);
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}
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static inline void setmosi(struct spi_device *spi, int val)
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{
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struct ap83_spi *sp = spidev_to_sp(spi);
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if (val)
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sp->addr |= AP83_SPI_MOSI_HIGH;
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else
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sp->addr &= ~AP83_SPI_MOSI_HIGH;
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dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n",
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sp->addr, (val) ? "HIGH" : "LOW");
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ap83_spi_rr(sp, sp->addr);
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}
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static inline u32 getmiso(struct spi_device *spi)
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{
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u32 ret;
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ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0;
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dev_dbg(&spi->dev, "get MISO: %d\n", ret);
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return ret;
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}
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static inline void do_spidelay(struct spi_device *spi, unsigned nsecs)
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{
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ndelay(nsecs);
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}
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static void ap83_spi_chipselect(struct spi_device *spi, int on)
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{
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struct ap83_spi *sp = spidev_to_sp(spi);
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dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1);
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if (on) {
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ar71xx_flash_acquire();
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sp->addr = 0;
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ap83_spi_rr(sp, sp->addr);
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gpio_set_value(AP83_SPI_GPIO_CS, 0);
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} else {
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gpio_set_value(AP83_SPI_GPIO_CS, 1);
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ar71xx_flash_release();
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}
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}
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#define spidelay(nsecs) \
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do { \
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/* Steal the spi_device pointer from our caller. \
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* The bitbang-API should probably get fixed here... */ \
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do_spidelay(spi, nsecs); \
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} while (0)
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#define EXPAND_BITBANG_TXRX
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#include <linux/spi/spi_bitbang.h>
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static u32 ap83_spi_txrx_mode0(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits);
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return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
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}
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static u32 ap83_spi_txrx_mode1(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits);
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return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
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}
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static u32 ap83_spi_txrx_mode2(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits);
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return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
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}
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static u32 ap83_spi_txrx_mode3(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits);
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return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
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}
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static int ap83_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct ap83_spi *sp;
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struct ap83_spi_platform_data *pdata;
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struct resource *r;
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int ret;
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ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso");
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if (ret) {
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dev_err(&pdev->dev, "gpio request failed for MISO\n");
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return ret;
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}
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ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs");
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if (ret) {
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dev_err(&pdev->dev, "gpio request failed for CS\n");
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goto err_free_miso;
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}
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ret = gpio_direction_input(AP83_SPI_GPIO_MISO);
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if (ret) {
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dev_err(&pdev->dev, "unable to set direction of MISO\n");
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goto err_free_cs;
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}
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ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0);
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if (ret) {
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dev_err(&pdev->dev, "unable to set direction of CS\n");
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goto err_free_cs;
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}
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master = spi_alloc_master(&pdev->dev, sizeof(*sp));
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if (master == NULL) {
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dev_err(&pdev->dev, "failed to allocate spi master\n");
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return -ENOMEM;
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}
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sp = spi_master_get_devdata(master);
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platform_set_drvdata(pdev, sp);
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pdata = pdev->dev.platform_data;
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sp->bitbang.master = spi_master_get(master);
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sp->bitbang.chipselect = ap83_spi_chipselect;
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sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0;
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sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1;
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sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2;
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sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3;
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sp->bitbang.master->bus_num = pdev->id;
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sp->bitbang.master->num_chipselect = 1;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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ret = -ENOENT;
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goto err_spi_put;
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}
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sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
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if (!sp->base) {
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ret = -ENXIO;
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goto err_spi_put;
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}
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ret = spi_bitbang_start(&sp->bitbang);
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if (!ret)
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goto err_unmap;
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dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start);
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return 0;
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err_unmap:
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iounmap(sp->base);
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err_spi_put:
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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err_free_cs:
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gpio_free(AP83_SPI_GPIO_CS);
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err_free_miso:
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gpio_free(AP83_SPI_GPIO_MISO);
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return ret;
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}
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static int ap83_spi_remove(struct platform_device *pdev)
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{
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struct ap83_spi *sp = platform_get_drvdata(pdev);
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spi_bitbang_stop(&sp->bitbang);
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iounmap(sp->base);
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platform_set_drvdata(pdev, NULL);
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spi_master_put(sp->bitbang.master);
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return 0;
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}
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static struct platform_driver ap83_spi_drv = {
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.probe = ap83_spi_probe,
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.remove = ap83_spi_remove,
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.driver = {
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.name = DRV_NAME,
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.owner = THIS_MODULE,
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},
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};
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static int __init ap83_spi_init(void)
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{
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return platform_driver_register(&ap83_spi_drv);
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}
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module_init(ap83_spi_init);
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static void __exit ap83_spi_exit(void)
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{
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platform_driver_unregister(&ap83_spi_drv);
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}
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module_exit(ap83_spi_exit);
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MODULE_ALIAS("platform:" DRV_NAME);
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MODULE_DESCRIPTION(DRV_DESC);
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MODULE_VERSION(DRV_VERSION);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,27 @@
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--- a/drivers/spi/Makefile
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+++ b/drivers/spi/Makefile
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@@ -11,6 +11,7 @@ endif
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obj-$(CONFIG_SPI_MASTER) += spi.o
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# SPI master controller drivers (bus)
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+obj-$(CONFIG_SPI_AP83) += ap83_spi.o
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obj-$(CONFIG_SPI_AR71XX) += ar71xx_spi.o
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obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
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obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
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--- a/drivers/spi/Kconfig
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+++ b/drivers/spi/Kconfig
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@@ -53,6 +53,14 @@ if SPI_MASTER
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comment "SPI Master Controller Drivers"
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+config SPI_AP83
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+ tristate "Atheros AP83 specific SPI Controller"
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+ depends on SPI_MASTER && AR71XX_MACH_AP83
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+ select SPI_BITBANG
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+ help
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+ This is a specific SPI controller driver for the Atheros AP83
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+ reference board.
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+
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config SPI_AR71XX
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tristate "Atheros AR71xx SPI Controller"
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depends on SPI_MASTER && ATHEROS_AR71XX
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