149 lines
5.2 KiB
Diff
149 lines
5.2 KiB
Diff
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From 6eca6c329b247adab647f1d4b380cd630f923806 Mon Sep 17 00:00:00 2001
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From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
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Date: Thu, 15 Jul 2021 01:07:58 +0200
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Subject: [PATCH] drm/vc4: Add support for more analog TV standards
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Add support for the following composite output modes (all of them are
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somewhat more obscure than the previously defined ones):
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- NTSC_443 - NTSC-style signal with the chroma subcarrier shifted to
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4.43361875 MHz (the PAL subcarrier frequency). Never used for
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broadcasting, but sometimes used as a hack to play NTSC content in PAL
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regions (e.g. on VCRs).
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- PAL_N - PAL with alternative chroma subcarrier frequency,
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3.58205625 MHz. Used as a broadcast standard in Argentina, Paraguay
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and Uruguay to fit 576i50 with colour in 6 MHz channel raster.
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- PAL60 - 480i60 signal with PAL-style color at normal European PAL
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frequency. Another non-standard, non-broadcast mode, used in similar
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contexts as NTSC_443. Some displays support one but not the other.
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- SECAM - French frequency-modulated analog color standard; also have
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been broadcast in Eastern Europe and various parts of Africa and Asia.
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Uses the same 576i50 timings as PAL.
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Also added some comments explaining color subcarrier frequency
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registers.
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Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
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---
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drivers/gpu/drm/vc4/vc4_vec.c | 63 +++++++++++++++++++++++++++++++++++
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1 file changed, 63 insertions(+)
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--- a/drivers/gpu/drm/vc4/vc4_vec.c
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+++ b/drivers/gpu/drm/vc4/vc4_vec.c
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@@ -45,6 +45,7 @@
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#define VEC_CONFIG0_YDEL(x) ((x) << 26)
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#define VEC_CONFIG0_CDEL_MASK GENMASK(25, 24)
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#define VEC_CONFIG0_CDEL(x) ((x) << 24)
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+#define VEC_CONFIG0_SECAM_STD BIT(21)
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#define VEC_CONFIG0_PBPR_FIL BIT(18)
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#define VEC_CONFIG0_CHROMA_GAIN_MASK GENMASK(17, 16)
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#define VEC_CONFIG0_CHROMA_GAIN_UNITY (0 << 16)
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@@ -75,6 +76,27 @@
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#define VEC_SOFT_RESET 0x10c
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#define VEC_CLMP0_START 0x144
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#define VEC_CLMP0_END 0x148
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+
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+/*
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+ * These set the color subcarrier frequency
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+ * if VEC_CONFIG1_CUSTOM_FREQ is enabled.
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+ *
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+ * VEC_FREQ1_0 contains the most significant 16-bit half-word,
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+ * VEC_FREQ3_2 contains the least significant 16-bit half-word.
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+ * 0x80000000 seems to be equivalent to the pixel clock
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+ * (which itself is the VEC clock divided by 8).
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+ *
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+ * Reference values (with the default pixel clock of 13.5 MHz):
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+ *
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+ * NTSC (3579545.[45] Hz) - 0x21F07C1F
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+ * PAL (4433618.75 Hz) - 0x2A098ACB
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+ * PAL-M (3575611.[888111] Hz) - 0x21E6EFE3
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+ * PAL-N (3582056.25 Hz) - 0x21F69446
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+ *
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+ * NOTE: For SECAM, it is used as the Dr center frequency,
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+ * regardless of whether VEC_CONFIG1_CUSTOM_FREQ is enabled or not;
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+ * that is specified as 4406250 Hz, which corresponds to 0x29C71C72.
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+ */
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#define VEC_FREQ3_2 0x180
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#define VEC_FREQ1_0 0x184
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@@ -117,6 +139,14 @@
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#define VEC_INTERRUPT_CONTROL 0x190
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#define VEC_INTERRUPT_STATUS 0x194
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+
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+/*
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+ * Db center frequency for SECAM; the clock for this is the same as for
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+ * VEC_FREQ3_2/VEC_FREQ1_0, which is used for Dr center frequency.
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+ *
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+ * This is specified as 4250000 Hz, which corresponds to 0x284BDA13.
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+ * That is also the default value, so no need to set it explicitly.
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+ */
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#define VEC_FCW_SECAM_B 0x198
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#define VEC_SECAM_GAIN_VAL 0x19c
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@@ -210,8 +240,12 @@ to_vc4_vec_connector(struct drm_connecto
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enum vc4_vec_tv_mode_id {
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VC4_VEC_TV_MODE_NTSC,
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VC4_VEC_TV_MODE_NTSC_J,
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+ VC4_VEC_TV_MODE_NTSC_443,
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VC4_VEC_TV_MODE_PAL,
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VC4_VEC_TV_MODE_PAL_M,
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+ VC4_VEC_TV_MODE_PAL_N,
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+ VC4_VEC_TV_MODE_PAL60,
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+ VC4_VEC_TV_MODE_SECAM,
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};
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struct vc4_vec_tv_mode {
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@@ -273,6 +307,13 @@ static const struct vc4_vec_tv_mode vc4_
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.config0 = VEC_CONFIG0_NTSC_STD,
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.config1 = VEC_CONFIG1_C_CVBS_CVBS,
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},
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+ [VC4_VEC_TV_MODE_NTSC_443] = {
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+ /* NTSC with PAL chroma frequency */
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+ .mode = &drm_mode_480i,
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+ .config0 = VEC_CONFIG0_NTSC_STD,
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+ .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
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+ .custom_freq = 0x2a098acb,
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+ },
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[VC4_VEC_TV_MODE_PAL] = {
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.mode = &drm_mode_576i,
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.config0 = VEC_CONFIG0_PAL_BDGHI_STD,
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@@ -283,6 +324,24 @@ static const struct vc4_vec_tv_mode vc4_
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.config0 = VEC_CONFIG0_PAL_M_STD,
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.config1 = VEC_CONFIG1_C_CVBS_CVBS,
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},
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+ [VC4_VEC_TV_MODE_PAL_N] = {
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+ .mode = &drm_mode_576i,
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+ .config0 = VEC_CONFIG0_PAL_N_STD,
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+ .config1 = VEC_CONFIG1_C_CVBS_CVBS,
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+ },
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+ [VC4_VEC_TV_MODE_PAL60] = {
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+ /* PAL-M with chroma frequency of regular PAL */
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+ .mode = &drm_mode_480i,
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+ .config0 = VEC_CONFIG0_PAL_M_STD,
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+ .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
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+ .custom_freq = 0x2a098acb,
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+ },
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+ [VC4_VEC_TV_MODE_SECAM] = {
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+ .mode = &drm_mode_576i,
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+ .config0 = VEC_CONFIG0_SECAM_STD,
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+ .config1 = VEC_CONFIG1_C_CVBS_CVBS,
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+ .custom_freq = 0x29c71c72,
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+ },
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};
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static enum drm_connector_status
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@@ -505,8 +564,12 @@ static const struct of_device_id vc4_vec
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static const char * const tv_mode_names[] = {
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[VC4_VEC_TV_MODE_NTSC] = "NTSC",
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[VC4_VEC_TV_MODE_NTSC_J] = "NTSC-J",
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+ [VC4_VEC_TV_MODE_NTSC_443] = "NTSC-443",
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[VC4_VEC_TV_MODE_PAL] = "PAL",
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[VC4_VEC_TV_MODE_PAL_M] = "PAL-M",
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+ [VC4_VEC_TV_MODE_PAL_N] = "PAL-N",
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+ [VC4_VEC_TV_MODE_PAL60] = "PAL60",
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+ [VC4_VEC_TV_MODE_SECAM] = "SECAM",
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};
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static int vc4_vec_bind(struct device *dev, struct device *master, void *data)
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