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212 lines
5.8 KiB
Diff
212 lines
5.8 KiB
Diff
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From ff31834cfaac386f94ddd65fab8b87d090c69bcc Mon Sep 17 00:00:00 2001
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From: Mike Westerhof <mwester@dls.net>
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Date: Thu, 13 Nov 2008 20:38:35 +0000
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Subject: [PATCH] fix-gta01-s3c-mci-stop-clock-when-idle.patch
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This patch, based on the work done by Andy Green for the Glamo mci
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driver, makes sure that the SD clock only runs during data transfers.
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This can be overridden on the kernel command line if desired. Also
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added is the ability for the maximum SD clock speed to be limited.
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Signed-off-by: Mike Westerhof (mwester@dls.net)
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---
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drivers/mmc/host/s3cmci.c | 113 +++++++++++++++++++++++++++++++++++++++++++--
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1 files changed, 109 insertions(+), 4 deletions(-)
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diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
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index edba055..8f88721 100644
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--- a/drivers/mmc/host/s3cmci.c
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+++ b/drivers/mmc/host/s3cmci.c
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@@ -15,6 +15,8 @@
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#include <linux/mmc/host.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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+#include <linux/delay.h>
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+#include <linux/spinlock.h>
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#include <asm/dma.h>
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#include <asm/dma-mapping.h>
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@@ -29,6 +31,37 @@
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#define DRIVER_NAME "s3c-mci"
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+static spinlock_t clock_lock;
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+
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+/*
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+ * Max SD clock rate (in Hz)
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+ *
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+ * you can override this on the kernel command line using
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+ *
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+ * s3cmci.sd_max_clk=10000000
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+ *
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+ * for example.
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+ */
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+
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+static int sd_max_clk = 25000000;
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+module_param(sd_max_clk, int, 0644);
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+
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+/*
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+ * SD allow SD clock to run while idle
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+ *
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+ * you can override this on kernel commandline using
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+ *
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+ * s3cmci.sd_idleclk=0
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+ *
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+ * for example.
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+ */
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+
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+static int sd_idleclk; /* disallow idle clock by default */
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+module_param(sd_idleclk, int, 0644);
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+
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+/* used to stash real idleclk state in suspend: we force it to run in there */
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+static int suspend_sd_idleclk;
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+
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enum dbg_channels {
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dbg_err = (1 << 0),
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dbg_debug = (1 << 1),
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@@ -368,6 +401,40 @@ static void pio_tasklet(unsigned long data)
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enable_irq(host->irq);
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}
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+static void __s3cmci_enable_clock(struct s3cmci_host *host)
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+{
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+ u32 mci_con;
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+ unsigned long flags;
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+
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+ /* enable the clock if clock rate is > 0 */
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+ if (host->real_rate) {
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+ spin_lock_irqsave(&clock_lock, flags);
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+
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+ mci_con = readl(host->base + S3C2410_SDICON);
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+ mci_con |= S3C2410_SDICON_CLOCKTYPE;
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+ writel(mci_con, host->base + S3C2410_SDICON);
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+
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+ spin_unlock_irqrestore(&clock_lock, flags);
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+ }
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+}
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+
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+static void __s3cmci_disable_clock(struct s3cmci_host *host)
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+{
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+ u32 mci_con;
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+ unsigned long flags;
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+
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+ if (!sd_idleclk) {
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+ spin_lock_irqsave(&clock_lock, flags);
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+
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+ mci_con = readl(host->base + S3C2410_SDICON);
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+ mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
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+ writel(mci_con, host->base + S3C2410_SDICON);
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+
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+ spin_unlock_irqrestore(&clock_lock, flags);
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+ }
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+}
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+
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+
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/*
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* ISR for SDI Interface IRQ
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* Communication between driver and ISR works as follows:
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@@ -749,6 +816,7 @@ static void finalize_request(struct s3cmci_host *host)
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}
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request_done:
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+ __s3cmci_disable_clock(host);
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host->complete_what = COMPLETION_NONE;
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host->mrq = NULL;
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mmc_request_done(host->mmc, mrq);
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@@ -1005,6 +1073,7 @@ static void s3cmci_send_request(struct mmc_host *mmc)
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}
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+ __s3cmci_enable_clock(host);
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s3cmci_send_command(host, cmd);
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enable_irq(host->irq);
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}
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@@ -1087,14 +1156,30 @@ static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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if ((ios->power_mode == MMC_POWER_ON)
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|| (ios->power_mode == MMC_POWER_UP)) {
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- dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n",
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- host->real_rate/1000, ios->clock/1000);
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+ dbg(host, dbg_conf,
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+ "powered (vdd: %d), clk: %lukHz div=%lu (req: %ukHz),"
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+ " bus width: %d\n", ios->vdd, host->real_rate / 1000,
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+ host->clk_div * (host->prescaler + 1),
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+ ios->clock / 1000, ios->bus_width);
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+
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+ /* After power-up, we need to give the card 74 clocks to
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+ * initialize, so sleep just a moment before we disable
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+ * the clock again.
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+ */
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+ if (ios->clock)
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+ msleep(1);
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+
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} else {
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dbg(host, dbg_conf, "powered down.\n");
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}
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host->bus_width = ios->bus_width;
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+ /* No need to run the clock until we have data to move */
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+ if (!sd_idleclk) {
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+ __s3cmci_disable_clock(host);
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+ dbg(host, dbg_conf, "SD clock disabled when idle.\n");
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+ }
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}
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static void s3cmci_reset(struct s3cmci_host *host)
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@@ -1267,7 +1352,7 @@ static int s3cmci_probe(struct platform_device *pdev, int is2440)
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mmc->ocr_avail = host->pdata->ocr_avail;
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mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
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mmc->f_min = host->clk_rate / (host->clk_div * 256);
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- mmc->f_max = host->clk_rate / host->clk_div;
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+ mmc->f_max = sd_max_clk;
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mmc->max_blk_count = 4095;
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mmc->max_blk_size = 4095;
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@@ -1354,14 +1439,33 @@ static int s3cmci_probe_2440(struct platform_device *dev)
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static int s3cmci_suspend(struct platform_device *dev, pm_message_t state)
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{
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struct mmc_host *mmc = platform_get_drvdata(dev);
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+ struct s3cmci_host *host = mmc_priv(mmc);
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+ int ret;
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+
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+ /* Ensure clock is running so it will be running on resume */
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+ __s3cmci_enable_clock(host);
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- return mmc_suspend_host(mmc, state);
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+ /* We will do more commands, make sure the clock stays running,
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+ * and save our state so that we can restore it on resume.
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+ */
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+ suspend_sd_idleclk = sd_idleclk;
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+ sd_idleclk = 1;
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+
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+ ret = mmc_suspend_host(mmc, state);
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+
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+ /* so that when we resume, we use any modified max rate */
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+ mmc->f_max = sd_max_clk;
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+
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+ return ret;
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}
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static int s3cmci_resume(struct platform_device *dev)
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{
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struct mmc_host *mmc = platform_get_drvdata(dev);
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+ /* Put the sd_idleclk state back to what it was */
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+ sd_idleclk = suspend_sd_idleclk;
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+
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return mmc_resume_host(mmc);
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}
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@@ -1398,6 +1502,7 @@ static struct platform_driver s3cmci_driver_2440 = {
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static int __init s3cmci_init(void)
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{
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+ spin_lock_init(&clock_lock);
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platform_driver_register(&s3cmci_driver_2410);
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platform_driver_register(&s3cmci_driver_2412);
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platform_driver_register(&s3cmci_driver_2440);
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--
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1.5.6.5
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