openwrt/target/linux/realtek/dts/rtl8382_allnet_all-sg8208m.dts

// SPDX-License-Identifier: GPL-2.0-or-later

#include "rtl838x.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "allnet,all-sg8208m", "realtek,rtl838x-soc";
	model = "ALLNET ALL-SG8208M";

	aliases {
		led-boot = &led_sys;
		led-failsafe = &led_sys;
		led-running = &led_sys;
		led-upgrade = &led_sys;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x8000000>;
	};

	keys {
		compatible = "gpio-keys-polled";
		poll-interval = <20>;

		reset {
			label = "reset";
			gpios = <&gpio0 67 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_sys: sys {
			label = "green:sys";
			gpios = <&gpio0 47 GPIO_ACTIVE_HIGH>;
		};
		// GPIO 25: power on/off all port leds
	};
};

&gpio0 {
	indirect-access-bus-id = <0>;
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x80000>;
				read-only;
			};

			partition@80000 {
				label = "u-boot-env";
				reg = <0x80000 0x10000>;
				read-only;
			};

			partition@90000 {
				label = "u-boot-env2";
				reg = <0x90000 0x10000>;
			};

			partition@a0000 {
				label = "jffs";
				reg = <0xa0000 0x100000>;
			};

			partition@1a0000 {
				label = "jffs2";
				reg = <0x1a0000 0x100000>;
			};

			partition@2a0000 {
				label = "firmware";
				reg = <0x2a0000 0xd60000>;
				compatible = "openwrt,uimage", "denx,uimage";
				openwrt,ih-magic = <0x00000006>;
			};
		};
	};
};

&ethernet0 {
	mdio: mdio-bus {
		compatible = "realtek,rtl838x-mdio";
		regmap = <&ethernet0>;
		#address-cells = <1>;
		#size-cells = <0>;

		INTERNAL_PHY(8)
		INTERNAL_PHY(9)
		INTERNAL_PHY(10)
		INTERNAL_PHY(11)
		INTERNAL_PHY(12)
		INTERNAL_PHY(13)
		INTERNAL_PHY(14)
		INTERNAL_PHY(15)
	};
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		SWITCH_PORT(8, 1, internal)
		SWITCH_PORT(9, 2, internal)
		SWITCH_PORT(10, 3, internal)
		SWITCH_PORT(11, 4, internal)
		SWITCH_PORT(12, 5, internal)
		SWITCH_PORT(13, 6, internal)
		SWITCH_PORT(14, 7, internal)
		SWITCH_PORT(15, 8, internal)

		port@28 {
			ethernet = <&ethernet0>;
			reg = <28>;
			phy-mode = "internal";
			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};
	};
};