openwrt/target/linux/ipq40xx/patches-5.10/300-clk-qcom-ipq4019-add-ess-reset.patch

From 480c1f7648fc586db12d6003c717c23667a4fcf0 Mon Sep 17 00:00:00 2001
From: Ram Chandra Jangir <rjangir@codeaurora.org>
Date: Tue, 28 Mar 2017 22:35:33 +0530
Subject: [PATCH] clk: qcom: ipq4019: add ess reset

Added the ESS reset in IPQ4019 GCC.

Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
---
 drivers/clk/qcom/gcc-ipq4019.c               | 11 +++++++++++
 include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 +++++++++++
 2 files changed, 22 insertions(+)

--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1736,6 +1736,17 @@ static const struct qcom_reset_map gcc_i
 	[GCC_TCSR_BCR] = {0x22000, 0},
 	[GCC_MPM_BCR] = {0x24000, 0},
 	[GCC_SPDM_BCR] = {0x25000, 0},
+	[ESS_MAC1_ARES] = {0x1200C, 0},
+	[ESS_MAC2_ARES] = {0x1200C, 1},
+	[ESS_MAC3_ARES] = {0x1200C, 2},
+	[ESS_MAC4_ARES] = {0x1200C, 3},
+	[ESS_MAC5_ARES] = {0x1200C, 4},
+	[ESS_PSGMII_ARES] = {0x1200C, 5},
+	[ESS_MAC1_CLK_DIS] = {0x1200C, 8},
+	[ESS_MAC2_CLK_DIS] = {0x1200C, 9},
+	[ESS_MAC3_CLK_DIS] = {0x1200C, 10},
+	[ESS_MAC4_CLK_DIS] = {0x1200C, 11},
+	[ESS_MAC5_CLK_DIS] = {0x1200C, 12},
 };
 
 static const struct regmap_config gcc_ipq4019_regmap_config = {
--- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
@@ -165,5 +165,16 @@
 #define GCC_QDSS_BCR					69
 #define GCC_MPM_BCR					70
 #define GCC_SPDM_BCR					71
+#define ESS_MAC1_ARES					72
+#define ESS_MAC2_ARES					73
+#define ESS_MAC3_ARES					74
+#define ESS_MAC4_ARES					75
+#define ESS_MAC5_ARES					76
+#define ESS_PSGMII_ARES					77
+#define ESS_MAC1_CLK_DIS				78
+#define ESS_MAC2_CLK_DIS				79
+#define ESS_MAC3_CLK_DIS				80
+#define ESS_MAC4_CLK_DIS				81
+#define ESS_MAC5_CLK_DIS				82
 
 #endif