53 lines
1.6 KiB
Diff
53 lines
1.6 KiB
Diff
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From 40098f3d986dc90f6a7be0e5a35ddaccd1ded0b5 Mon Sep 17 00:00:00 2001
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From: William Qiu <william.qiu@starfivetech.com>
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Date: Thu, 6 Apr 2023 15:46:34 +0800
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Subject: [PATCH 038/122] riscv: dts: starfive: jh7110: Add syscon nodes
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Add stg_syscon/sys_syscon/aon_syscon nodes for JH7110 Soc.
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Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
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Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
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---
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arch/riscv/boot/dts/starfive/jh7110.dtsi | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
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+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
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@@ -353,6 +353,11 @@
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status = "disabled";
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};
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+ stg_syscon: syscon@10240000 {
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+ compatible = "starfive,jh7110-stg-syscon", "syscon";
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+ reg = <0x0 0x10240000 0x0 0x1000>;
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+ };
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+
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uart3: serial@12000000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x0 0x12000000 0x0 0x10000>;
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@@ -457,6 +462,11 @@
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#reset-cells = <1>;
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};
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+ sys_syscon: syscon@13030000 {
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+ compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
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+ reg = <0x0 0x13030000 0x0 0x1000>;
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+ };
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+
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sysgpio: pinctrl@13040000 {
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compatible = "starfive,jh7110-sys-pinctrl";
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reg = <0x0 0x13040000 0x0 0x10000>;
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@@ -486,6 +496,11 @@
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#reset-cells = <1>;
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};
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+ aon_syscon: syscon@17010000 {
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+ compatible = "starfive,jh7110-aon-syscon", "syscon", "simple-mfd";
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+ reg = <0x0 0x17010000 0x0 0x1000>;
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+ };
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+
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aongpio: pinctrl@17020000 {
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compatible = "starfive,jh7110-aon-pinctrl";
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reg = <0x0 0x17020000 0x0 0x10000>;
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