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openwrt/target/linux/tegra/Makefile

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target: use SPDX license identifiers on Makefiles Use SPDX license tags to allow machines to check licenses. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-10 13:52:34 +00:00
# SPDX-License-Identifier: GPL-2.0-only
tegra: add new target New target introduces initial support for NVIDIA Tegra SoC based devices. It focuses on Tegra 2 CPUs, for successors supporting NEON instruction set the target should be split in two subtargets. This initial commit doesn't create any device image, it's groundwork for further additions. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-04-01 17:25:38 +00:00
#
treewide: update email address of Tomasz Maciej Nowak Replace my o2.pl email address. I'm still available at the old address. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl> [rephrase commit title/message] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-11-20 18:46:35 +00:00
# Copyright (C) 2017-2019 Tomasz Maciej Nowak <tmn505@gmail.com>
target: use SPDX license identifiers on Makefiles Use SPDX license tags to allow machines to check licenses. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-10 13:52:34 +00:00
tegra: add new target New target introduces initial support for NVIDIA Tegra SoC based devices. It focuses on Tegra 2 CPUs, for successors supporting NEON instruction set the target should be split in two subtargets. This initial commit doesn't create any device image, it's groundwork for further additions. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-04-01 17:25:38 +00:00
include $(TOPDIR)/rules.mk
ARCH := arm
BOARD := tegra
BOARDNAME := NVIDIA Tegra
FEATURES := audio boot-part display ext4 fpu gpio pci pcie rootfs-part rtc squashfs usb
CPU_TYPE := cortex-a9
tegra: correct cpu subtype Tegra 2 processors have only 16 double-precision registers. The change introduced by 8dcc1087602e ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the toolchain for tegra target to cpu type with 32 double-precision registers. This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu is specified. That change resulted in unusable image, in which kernel will kill userspace as soon as it causing "Illegal instruction". Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272 Fixes: 8dcc1087602e ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2020-03-18 18:04:13 +00:00
CPU_SUBTYPE := vfpv3-d16
tegra: add new target New target introduces initial support for NVIDIA Tegra SoC based devices. It focuses on Tegra 2 CPUs, for successors supporting NEON instruction set the target should be split in two subtargets. This initial commit doesn't create any device image, it's groundwork for further additions. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-04-01 17:25:38 +00:00
tegra: switch to kernel 5.10 This target has testing support for kernel 5.10 for four months now. Time to switch the default. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Acked-by: Tomasz Maciej Nowak <tmn505@gmail.com>
2021-10-18 19:27:33 +00:00
KERNEL_PATCHVER := 5.10
tegra: add new target New target introduces initial support for NVIDIA Tegra SoC based devices. It focuses on Tegra 2 CPUs, for successors supporting NEON instruction set the target should be split in two subtargets. This initial commit doesn't create any device image, it's groundwork for further additions. Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl>
2019-04-01 17:25:38 +00:00
include $(INCLUDE_DIR)/target.mk
KERNELNAME := zImage dtbs
DEFAULT_PACKAGES += e2fsprogs mkf2fs partx-utils
define Target/Description
Build firmware image for NVIDIA Tegra SoC devices.
endef
$(eval $(call BuildTarget))