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38 lines
1.3 KiB
Diff
38 lines
1.3 KiB
Diff
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From 8f63346a74c8b3e37ffab2c7a2ddb3c08793dcc2 Mon Sep 17 00:00:00 2001
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From: Johan Hovold <johan+linaro@kernel.org>
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Date: Thu, 15 Sep 2022 16:34:30 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
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The size of the PCIe PHY serdes register region is 0x1c4 and the
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corresponding 'reg' property should specifically not include the
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adjacent regions that are defined in the child node (e.g. tx and rx).
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Fixes: 33057e1672fe ("ARM: dts: ipq8074: Add pcie nodes")
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Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20220915143431.19842-1-johan+linaro@kernel.org
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -199,7 +199,7 @@
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pcie_qmp0: phy@86000 {
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compatible = "qcom,ipq8074-qmp-pcie-phy";
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- reg = <0x00086000 0x1000>;
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+ reg = <0x00086000 0x1c4>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@@ -227,7 +227,7 @@
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pcie_qmp1: phy@8e000 {
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compatible = "qcom,ipq8074-qmp-pcie-phy";
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- reg = <0x0008e000 0x1000>;
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+ reg = <0x0008e000 0x1c4>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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