openwrt/target/linux/realtek/files-5.15/Documentation/devicetree/bindings/realtek,otto-timer.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/timer/realtek,rtl8300-timer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Realtek Timer Device Tree Bindings

maintainers:
  - Markus Stockhausen <markus.stockhausen@gmx.de>

description: |
  The Realtek SOCs of the RTL83XX and RTL93XX series have at least 5 known
  timers with corresponding interrupt lines . Their speed is derived from the
  Lexra Bus (LXB) by dividers. Each timer has a block of 4 control registers in
  the address range 0xb800xxxx with following start offsets.

  RTL83XX: 0x3100, 0x3110, 0x3120, 0x3130, 0x3140
  RTL93XX: 0x3200, 0x3210, 0x3220, 0x3230, 0x3240

properties:
  compatible:
    items:
      - enum:
        - realtek,rtl8380-timer
        - realtek,rtl8390-timer
        - realtek,rtl9300-timer
      - const: realtek,otto-timer

  reg:
    minItems: 5
    maxItems: 5
    description:
      List of timer register addresses.

  interrupts:
    minItems: 5
    maxItems: 5
    description:
      List of timer interrupts.

  clocks:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks

additionalProperties: false

examples:
  - |
    timer0: timer@3100 {
      compatible = "realtek,rtl8380-timer", "realtek,otto-timer";
      reg = <0x3100 0x10>, <0x3110 0x10>, <0x3120 0x10>,
            <0x3130 0x10>, <0x3140 0x10>;

      interrupt-parent = <&intc>;
      interrupts = <29 4>, <28 4>, <17 4>, <16 4>, <15 4>;
      clocks = <&ccu CLK_LXB>;
    };
  - |
    timer0: timer@3100 {
      compatible = "realtek,rtl8390-timer", "realtek,otto-timer";
      reg = <0x3100 0x10>, <0x3110 0x10>, <0x3120 0x10>,
            <0x3130 0x10>, <0x3140 0x10>;

      interrupt-parent = <&intc>;
      interrupts = <29 4>, <28 4>, <17 4>, <16 4>, <15 4>;
      clocks = <&ccu CLK_LXB>;
    };
  - |
    timer0: timer@3200 {
      compatible = "realtek,rtl9300-timer", "realtek,otto-timer";
      reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>,
            <0x3230 0x10>, <0x3240 0x10>;

      interrupt-parent = <&intc>;
      interrupts = <7 4>, <8 4>, <9 4>, <10 4>, <11 4>;
      clocks = <&ccu CLK_LXB>;
    };

...