2020-04-03 10:26:23 +00:00
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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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bcm63xx: add support for Technicolor TG582n
Technicolor TG582n has a similar PCB as the OpenWrt's ADB P.DG A4001N1
with LEDs connected to different GPIO PINs in active low configuration.
Hardware:
* Board ID: DANT-1
* SoC: Broadcom BCM6328 (rev b0) @ 320MHz, CPU BMIPS4350
* RAM DDR2: 64 Mbyte - Winbond W9751G6KB-25
* Serial flash: 16 Mbyte - MXIC MX25L6445EMI
* Ethernet: 4x Ethernet 10/100 baseT
* Wifi 2.4GHz: Broadcom Corporation BCM43227 Wireless Network Adapter (rev 30)
* LEDs: 2x Power, 1x Ethernet, 1x Broadband, 2x Wi-Fi, 2x WPS, 4x ethernet
* Buttons: 1x Reset, 1x WPS, 1x WiFi
* UART: 1x TTL 115200n8, VCC GND TX RX, on J3 connector (short R62 and R63)
Installation via CFE:
* Stock CFE has to be overwritten with a generic 6328 one that can upload
.bin images with no signature check (cfe6328_configured.bin)
* Connect a serial port to the board
* Stop the CFE boot process after power on by pressing enter
* Set static IP 192.168.2.10 and subnet mask 255.255.255.0
* Navigate to http://192.168.2.50/
* Upload the OpenWrt image file
PCB: |GPIO: |TG582n:
LED2R |488(08) |red Power
LED2G |484(04) |green Power
LED10R |486(06) |
LED13G |485(05) |green Ethernet
LED11R |494(14) |
LED14G |491(11) |green Broadband
LED5R |487(07) |red Internet
LED5G |481(01) |green Internet
LED12R |498(18) |
LED12G |499(19) |
LED6R |482(02) |red Wi-Fi
LED6G |483(03) |green Wi-Fi
LED7R |490(10) |red WPS
LED7G |489(09) |green WPS
LED4 |508(28) |ethernet port 4
LED3 |507(27) |ethernet port 3
LED9 |506(26) |ethernet port 2
LED8 |505(25) |ethernet port 1
SW3 |503(23) |key Reset
SW5 |504(24) |key WPS
SW4 |495(15) |key Wi-Fi
SW6 |493(13) |
SW1 |492(12) |
Signed-off-by: Daniele Castro <danielecastro@hotmail.it>
[Fix base-files, refresh patch]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2020-09-10 19:14:11 +00:00
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@@ -3202,6 +3202,22 @@ void __init board_bcm963xx_init(void)
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2020-04-03 10:26:23 +00:00
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val &= MPI_CSBASE_BASE_MASK;
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}
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boot_addr = (u8 *)KSEG1ADDR(val);
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+ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
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+
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+ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
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+ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
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+ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
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+ /* Do an early check of CFE and then select bank 0 */
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+
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+ if (boot_addr == (u8 *)0xbf800000) {
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+ u8 *tmp_boot_addr = (u8*)0xbfc00000;
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+
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+ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
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+ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
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+ pr_info("V2500V: nvram bank 0\n");
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+ boot_addr = tmp_boot_addr;
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+ }
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+ }
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/* dump cfe version */
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cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
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--- a/arch/mips/bcm63xx/dev-flash.c
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+++ b/arch/mips/bcm63xx/dev-flash.c
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@@ -21,6 +21,7 @@
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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+#include <bcm63xx_board.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_dev_flash.h>
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#include <bcm63xx_regs.h>
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2020-05-14 16:19:35 +00:00
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@@ -256,6 +257,13 @@ int __init bcm63xx_flash_register(void)
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2020-04-03 10:26:23 +00:00
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val = bcm_mpi_readl(MPI_CSBASE_REG(0));
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val &= MPI_CSBASE_BASE_MASK;
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+ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
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+ /* Loading from CFE always uses Bank 0 */
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+ if (!strcmp(board_get_name(), "V2500V_BB")) {
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+ pr_info("V2500V: Start in Bank 0\n");
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+ val = val + 0x400000; // Select Bank 0 start address
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+ }
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+
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mtd_resources[0].start = val;
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mtd_resources[0].end = 0x1FFFFFFF;
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}
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