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7cc3a28eed
despite sh not generally using register-pair alignment for 64-bit syscall arguments, there are arch-specific versions of the syscall entry points for pread and pwrite which include a dummy argument for alignment before the 64-bit offset argument.
89 lines
2.8 KiB
C
89 lines
2.8 KiB
C
#define __SYSCALL_LL_E(x) \
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((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
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((union { long long ll; long l[2]; }){ .ll = x }).l[1]
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#define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
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#define __SYSCALL_LL_PRW(x) 0, __SYSCALL_LL_E((x))
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/* The extra OR instructions are to work around a hardware bug:
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* http://documentation.renesas.com/doc/products/mpumcu/tu/tnsh7456ae.pdf
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*/
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#define __asm_syscall(trapno, ...) do { \
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__asm__ __volatile__ ( \
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"trapa #31\n" \
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"or r0, r0\n" \
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"or r0, r0\n" \
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"or r0, r0\n" \
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"or r0, r0\n" \
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"or r0, r0\n" \
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: "=r"(r0) : __VA_ARGS__ : "memory"); \
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return r0; \
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} while (0)
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static inline long __syscall0(long n)
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{
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register long r3 __asm__("r3") = n;
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register long r0 __asm__("r0");
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__asm_syscall(16, "r"(r3));
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}
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static inline long __syscall1(long n, long a)
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{
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register long r3 __asm__("r3") = n;
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register long r4 __asm__("r4") = a;
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register long r0 __asm__("r0");
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__asm_syscall(17, "r"(r3), "r"(r4));
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register long r3 __asm__("r3") = n;
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register long r4 __asm__("r4") = a;
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register long r5 __asm__("r5") = b;
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register long r0 __asm__("r0");
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__asm_syscall(18, "r"(r3), "r"(r4), "r"(r5));
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register long r3 __asm__("r3") = n;
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register long r4 __asm__("r4") = a;
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register long r5 __asm__("r5") = b;
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register long r6 __asm__("r6") = c;
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register long r0 __asm__("r0");
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__asm_syscall(19, "r"(r3), "r"(r4), "r"(r5), "r"(r6));
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register long r3 __asm__("r3") = n;
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register long r4 __asm__("r4") = a;
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register long r5 __asm__("r5") = b;
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register long r6 __asm__("r6") = c;
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register long r7 __asm__("r7") = d;
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register long r0 __asm__("r0");
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__asm_syscall(20, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7));
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}
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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register long r3 __asm__("r3") = n;
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register long r4 __asm__("r4") = a;
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register long r5 __asm__("r5") = b;
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register long r6 __asm__("r6") = c;
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register long r7 __asm__("r7") = d;
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register long r0 __asm__("r0") = e;
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__asm_syscall(21, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "0"(r0));
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
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{
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register long r3 __asm__("r3") = n;
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register long r4 __asm__("r4") = a;
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register long r5 __asm__("r5") = b;
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register long r6 __asm__("r6") = c;
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register long r7 __asm__("r7") = d;
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register long r0 __asm__("r0") = e;
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register long r1 __asm__("r1") = f;
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__asm_syscall(22, "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "0"(r0), "r"(r1));
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}
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