mirror of
git://git.musl-libc.org/musl
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83350eb17b
This patch adds an explicit cast to the int arguments passed to the inline asm used in the RISC-V's implementation of `a_cas`, to ensure that they are properly sign extended to 64 bits. They aren't automatically sign extended by Clang, and GCC technically also doesn't guarantee that they will be sign extended.
39 lines
767 B
C
39 lines
767 B
C
#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__ ("fence rw,rw" : : : "memory");
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}
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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int old, tmp;
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__asm__ __volatile__ (
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"\n1: lr.w.aqrl %0, (%2)\n"
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" bne %0, %3, 1f\n"
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" sc.w.aqrl %1, %4, (%2)\n"
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" bnez %1, 1b\n"
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"1:"
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: "=&r"(old), "=&r"(tmp)
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: "r"(p), "r"((long)t), "r"((long)s)
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: "memory");
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return old;
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}
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#define a_cas_p a_cas_p
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static inline void *a_cas_p(volatile void *p, void *t, void *s)
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{
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void *old;
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int tmp;
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__asm__ __volatile__ (
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"\n1: lr.d.aqrl %0, (%2)\n"
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" bne %0, %3, 1f\n"
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" sc.d.aqrl %1, %4, (%2)\n"
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" bnez %1, 1b\n"
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"1:"
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: "=&r"(old), "=&r"(tmp)
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: "r"(p), "r"(t), "r"(s)
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: "memory");
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return old;
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}
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