musl/arch/mips/reloc.h
Rich Felker 6d99ad91e8 add support for mips and mips64 r6 isa
mips32r6 and mips64r6 are actually new isas at both the asm source and
opcode levels (pre-r6 code cannot run on r6) and thus need to be
treated as a new subarch. the following changes are made, some of
which yield code generation improvements for non-r6 targets too:

- add subarch logic in configure script and reloc.h files for dynamic
  linker name.

- suppress use of .set mips2 asm directives (used to allow mips2
  atomic instructions on baseline mips1 builds; the kernel has to
  emulate them on mips1) except when actually needed. they cause wrong
  instruction encodings on r6, and pessimize inlining on at least some
  compilers.

- only hard-code sync instruction encoding on mips1.

- use "ZC" constraint instead of "m" constraint for llsc memory
  operands on r6, where the ll/sc instructions no longer accept full
  16-bit offsets.

- only hard-code rdhwr instruction encoding with .word on targets
  (pre-r2) where it may need trap-and-emulate by the kernel.
  otherwise, just use the instruction mnemonic, and allow an arbitrary
  destination register to be used.
2016-04-03 10:42:37 +00:00

53 lines
1.2 KiB
C

#include <endian.h>
#if __mips_isa_rev >= 6
#define ISA_SUFFIX "r6"
#else
#define ISA_SUFFIX ""
#endif
#if __BYTE_ORDER == __LITTLE_ENDIAN
#define ENDIAN_SUFFIX "el"
#else
#define ENDIAN_SUFFIX ""
#endif
#ifdef __mips_soft_float
#define FP_SUFFIX "-sf"
#else
#define FP_SUFFIX ""
#endif
#define LDSO_ARCH "mips" ISA_SUFFIX ENDIAN_SUFFIX FP_SUFFIX
#define TPOFF_K (-0x7000)
#define REL_SYM_OR_REL R_MIPS_REL32
#define REL_PLT R_MIPS_JUMP_SLOT
#define REL_COPY R_MIPS_COPY
#define REL_DTPMOD R_MIPS_TLS_DTPMOD32
#define REL_DTPOFF R_MIPS_TLS_DTPREL32
#define REL_TPOFF R_MIPS_TLS_TPREL32
#define NEED_MIPS_GOT_RELOCS 1
#define DT_DEBUG_INDIRECT DT_MIPS_RLD_MAP
#define ARCH_SYM_REJECT_UND(s) (!((s)->st_other & STO_MIPS_PLT))
#define CRTJMP(pc,sp) __asm__ __volatile__( \
"move $sp,%1 ; jr %0" : : "r"(pc), "r"(sp) : "memory" )
#define GETFUNCSYM(fp, sym, got) __asm__ ( \
".hidden " #sym "\n" \
".set push \n" \
".set noreorder \n" \
" bal 1f \n" \
" nop \n" \
" .gpword . \n" \
" .gpword " #sym " \n" \
"1: lw %0, ($ra) \n" \
" subu %0, $ra, %0 \n" \
" lw $ra, 4($ra) \n" \
" addu %0, %0, $ra \n" \
".set pop \n" \
: "=r"(*(fp)) : : "memory", "ra" )