Rich Felker 92637bb0d8 prevent reordering of or1k and powerpc thread pointer loads ... other archs use asm for the thread pointer load, so making that asm volatile is sufficient to inform the compiler that it has a "side effect" (crashing or giving the wrong result if the thread pointer was not yet initialized) that prevents reordering. however, powerpc and or1k have dedicated general purpose registers for the thread pointer and did not need to use any asm to access it; instead, "local register variables with a specified register" were used. however, there is no specification for ordering constraints on this type of usage, and presumably use of the thread pointer could be reordered across its initialization. to impose an ordering, I have added empty volatile asm blocks that produce the "local register variable with a specified register" as an output constraint.		2015-10-15 12:08:51 -04:00
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bits	reindent powerpc's bits/termios.h to be consistent with other archs	2015-09-15 14:30:08 -04:00
atomic.h	add explicit barrier operation to internal atomic.h API	2014-10-10 18:17:09 -04:00
crt_arch.h	add .text section directive to all crt_arch.h files missing it	2015-05-22 01:50:05 -04:00
pthread_arch.h	prevent reordering of or1k and powerpc thread pointer loads	2015-10-15 12:08:51 -04:00
reloc.h	new dlstart stage-2 chaining for powerpc	2015-09-17 07:20:58 +00:00
syscall_arch.h	unify non-inline version of syscall code across archs	2014-11-22 21:50:13 -05:00