mirror of
git://git.musl-libc.org/musl
synced 2024-12-15 03:05:15 +00:00
0c6abb5882
Update atomic.h to provide a_ctz_l in all cases (atomic_arch.h should now only provide a_ctz_32 and/or a_ctz_64). The generic version of a_ctz_32 now takes advantage of a_clz_32 if available and the generic a_ctz_64 now makes use of a_ctz_32.
109 lines
2.1 KiB
C
109 lines
2.1 KiB
C
#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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__asm__ __volatile__ (
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"lock ; cmpxchg %3, %1"
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: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
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return t;
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}
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#define a_swap a_swap
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static inline int a_swap(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"xchg %0, %1"
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: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
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return v;
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}
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#define a_fetch_add a_fetch_add
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static inline int a_fetch_add(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"lock ; xadd %0, %1"
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: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
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return v;
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}
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#define a_and a_and
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static inline void a_and(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"lock ; and %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_or a_or
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static inline void a_or(volatile int *p, int v)
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{
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__asm__ __volatile__(
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"lock ; or %1, %0"
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: "=m"(*p) : "r"(v) : "memory" );
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}
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#define a_inc a_inc
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static inline void a_inc(volatile int *p)
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{
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__asm__ __volatile__(
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"lock ; incl %0"
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: "=m"(*p) : "m"(*p) : "memory" );
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}
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#define a_dec a_dec
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static inline void a_dec(volatile int *p)
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{
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__asm__ __volatile__(
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"lock ; decl %0"
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: "=m"(*p) : "m"(*p) : "memory" );
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}
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#define a_store a_store
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static inline void a_store(volatile int *p, int x)
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{
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__asm__ __volatile__(
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"mov %1, %0 ; lock ; orl $0,(%%esp)"
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: "=m"(*p) : "r"(x) : "memory" );
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}
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__( "" : : : "memory" );
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}
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#define a_spin a_spin
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static inline void a_spin()
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{
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__asm__ __volatile__( "pause" : : : "memory" );
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}
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__( "hlt" : : : "memory" );
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}
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#define a_ctz_64 a_ctz_64
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static inline int a_ctz_64(uint64_t x)
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{
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int r;
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__asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; add $32,%0\n1:"
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: "=&r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
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return r;
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}
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#define a_ctz_32 a_ctz_32
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static inline int a_ctz_32(uint32_t x)
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{
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int r;
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__asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
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return r;
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}
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#define a_clz_32 a_clz_32
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static inline int a_clz_32(uint32_t x)
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{
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__asm__( "bsr %1,%0 ; xor $31,%0" : "=r"(x) : "r"(x) );
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return x;
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}
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