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8258014fd1
On 32 bit mips the kernel uses -1UL/2 to mark RLIM_INFINITY (and this is the definition in the userspace api), but since it is in the middle of the valid range of limits and limits are often compared with relational operators, various kernel side logic is broken if larger than -1UL/2 limits are used. So we truncate the limits to -1UL/2 in get/setrlimit and prlimit. Even if the kernel side logic consistently treated -1UL/2 as greater than any other limit value, there wouldn't be any clean workaround that allowed using large limits: * using -1UL/2 as RLIM_INFINITY in userspace would mean different infinity value for get/setrlimt and prlimit (where infinity is always -1ULL) and userspace logic could break easily (just like the kernel is broken now) and more special case code would be needed for mips. * translating -1UL/2 kernel side value to -1ULL in userspace would mean that -1UL/2 limit cannot be set (eg. -1UL/2+1 had to be passed to the kernel instead).
99 lines
2.2 KiB
C
99 lines
2.2 KiB
C
#define __SYSCALL_LL_E(x) \
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((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
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((union { long long ll; long l[2]; }){ .ll = x }).l[1]
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#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
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long (__syscall)(long, ...);
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#define SYSCALL_RLIM_INFINITY (-1UL/2)
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#ifndef __clang__
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#define __asm_syscall(...) do { \
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register long r2 __asm__("$2"); \
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__asm__ __volatile__ ( \
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"addu $2,$0,%2 ; syscall" \
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: "=&r"(r2), "=r"(r7) : "ir"(n), __VA_ARGS__, "0"(r2), "1"(r7) \
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: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", \
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"$14", "$15", "$24", "$25", "hi", "lo", "memory"); \
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return r7 ? -r2 : r2; \
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} while (0)
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static inline long __syscall0(long n)
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{
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register long r7 __asm__("$7");
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__asm_syscall("i"(0));
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}
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static inline long __syscall1(long n, long a)
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{
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register long r4 __asm__("$4") = a;
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register long r7 __asm__("$7");
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__asm_syscall("r"(r4));
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register long r4 __asm__("$4") = a;
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register long r5 __asm__("$5") = b;
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register long r7 __asm__("$7");
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__asm_syscall("r"(r4), "r"(r5));
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register long r4 __asm__("$4") = a;
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register long r5 __asm__("$5") = b;
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register long r6 __asm__("$6") = c;
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register long r7 __asm__("$7");
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__asm_syscall("r"(r4), "r"(r5), "r"(r6));
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register long r4 __asm__("$4") = a;
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register long r5 __asm__("$5") = b;
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register long r6 __asm__("$6") = c;
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register long r7 __asm__("$7") = d;
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__asm_syscall("r"(r4), "r"(r5), "r"(r6));
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}
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#else
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static inline long __syscall0(long n)
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{
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return (__syscall)(n);
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}
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static inline long __syscall1(long n, long a)
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{
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return (__syscall)(n, a);
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}
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static inline long __syscall2(long n, long a, long b)
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{
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return (__syscall)(n, a, b);
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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return (__syscall)(n, a, b, c);
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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return (__syscall)(n, a, b, c, d);
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}
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#endif
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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return (__syscall)(n, a, b, c, d, e);
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
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{
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return (__syscall)(n, a, b, c, d, e, f);
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}
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