mirror of
git://git.musl-libc.org/musl
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06fbefd100
counts leading zero bits of a 64bit int, undefined on zero input. (has nothing to do with atomics, added to atomic.h so target specific helper functions are together.) there is a logarithmic generic implementation and another in terms of a 32bit a_clz_32 on targets where that's available.
71 lines
1.4 KiB
C
71 lines
1.4 KiB
C
#define a_ll a_ll
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static inline int a_ll(volatile int *p)
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{
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int v;
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__asm__ __volatile__ ("lwarx %0, 0, %2" : "=r"(v) : "m"(*p), "r"(p));
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return v;
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}
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#define a_sc a_sc
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static inline int a_sc(volatile int *p, int v)
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{
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int r;
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__asm__ __volatile__ (
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"stwcx. %2, 0, %3 ; mfcr %0"
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: "=r"(r), "=m"(*p) : "r"(v), "r"(p) : "memory", "cc");
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return r & 0x20000000; /* "bit 2" of "cr0" (backwards bit order) */
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}
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#define a_ll_p a_ll_p
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static inline void *a_ll_p(volatile void *p)
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{
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void *v;
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__asm__ __volatile__ ("ldarx %0, 0, %2" : "=r"(v) : "m"(*(void *volatile *)p), "r"(p));
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return v;
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}
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#define a_sc_p a_sc_p
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static inline int a_sc_p(volatile void *p, void *v)
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{
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int r;
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__asm__ __volatile__ (
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"stdcx. %2, 0, %3 ; mfcr %0"
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: "=r"(r), "=m"(*(void *volatile *)p) : "r"(v), "r"(p) : "memory", "cc");
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return r & 0x20000000; /* "bit 2" of "cr0" (backwards bit order) */
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}
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__ ("sync" : : : "memory");
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}
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#define a_pre_llsc a_barrier
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#define a_post_llsc a_post_llsc
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static inline void a_post_llsc()
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{
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__asm__ __volatile__ ("isync" : : : "memory");
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}
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#define a_store a_store
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static inline void a_store(volatile int *p, int v)
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{
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a_pre_llsc();
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*p = v;
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a_post_llsc();
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}
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__ (".long 0");
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}
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#define a_clz_64 a_clz_64
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static inline int a_clz_64(uint64_t x)
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{
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__asm__ ("cntlzd %0, %1" : "=r"(x) : "r"(x));
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return x;
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}
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