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0cd2be2314
the mode member of struct ipc_perm is specified by POSIX to have type mode_t, which is uniformly defined as unsigned int. however, Linux defines it with type __kernel_mode_t, and defines __kernel_mode_t as unsigned short on some archs. since there is a subsequent padding field, treating it as a 32-bit unsigned int works on little endian archs, but the order is backwards on big endian archs with the erroneous definition. since multiple archs are affected, remedy the situation with fixup code in the affected functions (shmctl, semctl, and msgctl) rather than repeating the same shims in syscall_arch.h for every affected arch.
92 lines
2.7 KiB
C
92 lines
2.7 KiB
C
#define __SYSCALL_LL_E(x) \
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((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
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((union { long long ll; long l[2]; }){ .ll = x }).l[1]
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#define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
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static __inline long __syscall0(long n)
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{
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register unsigned long d0 __asm__("d0") = n;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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:
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: "memory");
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return d0;
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}
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static inline long __syscall1(long n, long a)
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{
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register unsigned long d0 __asm__("d0") = n;
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register unsigned long d1 __asm__("d1") = a;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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: "r"(d1)
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: "memory");
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return d0;
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register unsigned long d0 __asm__("d0") = n;
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register unsigned long d1 __asm__("d1") = a;
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register unsigned long d2 __asm__("d2") = b;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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: "r"(d1), "r"(d2)
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: "memory");
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return d0;
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register unsigned long d0 __asm__("d0") = n;
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register unsigned long d1 __asm__("d1") = a;
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register unsigned long d2 __asm__("d2") = b;
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register unsigned long d3 __asm__("d3") = c;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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: "r"(d1), "r"(d2), "r"(d3)
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: "memory");
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return d0;
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register unsigned long d0 __asm__("d0") = n;
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register unsigned long d1 __asm__("d1") = a;
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register unsigned long d2 __asm__("d2") = b;
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register unsigned long d3 __asm__("d3") = c;
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register unsigned long d4 __asm__("d4") = d;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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: "r"(d1), "r"(d2), "r"(d3), "r"(d4)
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: "memory");
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return d0;
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}
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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register unsigned long d0 __asm__("d0") = n;
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register unsigned long d1 __asm__("d1") = a;
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register unsigned long d2 __asm__("d2") = b;
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register unsigned long d3 __asm__("d3") = c;
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register unsigned long d4 __asm__("d4") = d;
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register unsigned long d5 __asm__("d5") = e;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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: "r"(d1), "r"(d2), "r"(d3), "r"(d4), "r"(d5)
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: "memory");
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return d0;
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
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{
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register unsigned long d0 __asm__("d0") = n;
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register unsigned long d1 __asm__("d1") = a;
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register unsigned long d2 __asm__("d2") = b;
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register unsigned long d3 __asm__("d3") = c;
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register unsigned long d4 __asm__("d4") = d;
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register unsigned long d5 __asm__("d5") = e;
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register unsigned long a0 __asm__("a0") = f;
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__asm__ __volatile__ ("trap #0" : "+r"(d0)
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: "r"(d1), "r"(d2), "r"(d3), "r"(d4), "r"(d5), "r"(a0)
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: "memory");
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return d0;
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}
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#define SYSCALL_USE_SOCKETCALL
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#define SYSCALL_IPC_BROKEN_MODE
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