musl/arch
Rich Felker f81e44a0d9 add m68k port
three ABIs are supported: the default with 68881 80-bit fpu format and
results returned in floating point registers, softfloat-only with the
same format, and coldfire fpu with IEEE single/double only. only the
first is tested at all, and only under qemu which has fpu emulation
bugs.

basic functionality smoke tests have been performed for the most
common arch-specific breakage via libc-test and qemu user-level
emulation. some sysvipc failures remain, but are shared with other big
endian archs and will be fixed separately.
2018-06-19 13:24:05 -04:00
..
aarch64 fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
arm fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
generic/bits fix minor namespace issues in termios.h 2018-03-10 18:19:41 -05:00
i386 remove a_ctz_l from arch specific atomic_arch.h 2018-04-19 12:23:17 -04:00
m68k add m68k port 2018-06-19 13:24:05 -04:00
microblaze microblaze: add statx syscall from linux v4.13 2017-11-05 18:41:29 -05:00
mips fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
mips64 fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
mipsn32 fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
or1k fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
powerpc fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
powerpc64 fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
s390x use PAGESIZE rather than PAGE_SIZE in user.h bits 2018-03-10 17:49:23 -05:00
sh fix TLS layout of TLS variant I when there is a gap above TP 2018-06-02 19:38:44 -04:00
x32 remove a_ctz_l from arch specific atomic_arch.h 2018-04-19 12:23:17 -04:00
x86_64 use PAGESIZE rather than PAGE_SIZE in user.h bits 2018-03-10 17:49:23 -05:00