mirror of
git://git.musl-libc.org/musl
synced 2024-12-13 10:15:40 +00:00
51fd67fcbf
without this, the SO_RCVTIMEO and SO_SNDTIMEO socket options would stop working on pre-5.1 kernels after time_t is switched to 64-bit and their values are changed to the new time64 versions. new code is written such that it's statically unreachable on 64-bit archs, and on existing 32-bit archs until the macro values are changed to activate 64-bit time_t.
95 lines
3.0 KiB
C
95 lines
3.0 KiB
C
#define __SYSCALL_LL_E(x) \
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((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
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((union { long long ll; long l[2]; }){ .ll = x }).l[1]
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#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
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static inline long __syscall0(long n)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3");
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "=r"(r3)
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:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall1(long n, long a)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3)
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:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4)
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:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
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:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
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:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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register long r7 __asm__("r7") = e;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
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:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
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return r3;
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
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{
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register long r0 __asm__("r0") = n;
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register long r3 __asm__("r3") = a;
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register long r4 __asm__("r4") = b;
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register long r5 __asm__("r5") = c;
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register long r6 __asm__("r6") = d;
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register long r7 __asm__("r7") = e;
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register long r8 __asm__("r8") = f;
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__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
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: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
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:: "memory", "cr0", "r9", "r10", "r11", "r12");
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return r3;
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}
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#define SYSCALL_FADVISE_6_ARG
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#define SO_RCVTIMEO_OLD 18
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#define SO_SNDTIMEO_OLD 19
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