mirror of
git://git.musl-libc.org/musl
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980f80f792
a fully thumb1 build is not supported because some asm files are incompatible with thumb1, but apparently it works to compile the C code as thumb1 commit06fbefd100
caused this regression but introducing use of the clz instruction, which is not supported in arm mode prior to v5, and not supported in thumb prior to thumb2 (v6t2). commit1b9406b03c
fixed the issue only for arm mode pre-v5 but left thumb1 broken.
108 lines
2.1 KiB
C
108 lines
2.1 KiB
C
#include "libc.h"
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#if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
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#define BLX "mov lr,pc\n\tbx"
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#else
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#define BLX "blx"
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#endif
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extern hidden uintptr_t __a_cas_ptr, __a_barrier_ptr;
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#if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
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|| __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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#define a_ll a_ll
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static inline int a_ll(volatile int *p)
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{
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int v;
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__asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
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return v;
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}
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#define a_sc a_sc
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static inline int a_sc(volatile int *p, int v)
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{
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int r;
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__asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
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return !r;
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}
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#if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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__asm__ __volatile__ ("dmb ish" : : : "memory");
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}
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#endif
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#define a_pre_llsc a_barrier
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#define a_post_llsc a_barrier
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#else
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#define a_cas a_cas
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static inline int a_cas(volatile int *p, int t, int s)
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{
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for (;;) {
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register int r0 __asm__("r0") = t;
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register int r1 __asm__("r1") = s;
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register volatile int *r2 __asm__("r2") = p;
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register uintptr_t r3 __asm__("r3") = __a_cas_ptr;
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int old;
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__asm__ __volatile__ (
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BLX " r3"
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: "+r"(r0), "+r"(r3) : "r"(r1), "r"(r2)
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: "memory", "lr", "ip", "cc" );
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if (!r0) return t;
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if ((old=*p)!=t) return old;
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}
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}
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#endif
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#ifndef a_barrier
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#define a_barrier a_barrier
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static inline void a_barrier()
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{
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register uintptr_t ip __asm__("ip") = __a_barrier_ptr;
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__asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" );
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}
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#endif
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#define a_crash a_crash
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static inline void a_crash()
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{
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__asm__ __volatile__(
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#ifndef __thumb__
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".word 0xe7f000f0"
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#else
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".short 0xdeff"
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#endif
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: : : "memory");
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}
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#if __ARM_ARCH >= 5 && (!__thumb__ || __thumb2__)
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#define a_clz_32 a_clz_32
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static inline int a_clz_32(uint32_t x)
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{
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__asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
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return x;
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}
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#if __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
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#define a_ctz_32 a_ctz_32
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static inline int a_ctz_32(uint32_t x)
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{
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uint32_t xr;
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__asm__ ("rbit %0, %1" : "=r"(xr) : "r"(x));
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return a_clz_32(xr);
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}
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#endif
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#endif
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