riscv32: add setjmp/longjmp and sigreturn

Largely copied from riscv64 but required recalculation of offsets.
This commit is contained in:
Stefan O'Rear 2020-09-03 05:54:44 -04:00 committed by Rich Felker
parent 11eee89e14
commit c34a8eedff
4 changed files with 114 additions and 0 deletions

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.global __longjmp
.global _longjmp
.global longjmp
.type __longjmp, %function
.type _longjmp, %function
.type longjmp, %function
__longjmp:
_longjmp:
longjmp:
lw s0, 0(a0)
lw s1, 4(a0)
lw s2, 8(a0)
lw s3, 12(a0)
lw s4, 16(a0)
lw s5, 20(a0)
lw s6, 24(a0)
lw s7, 28(a0)
lw s8, 32(a0)
lw s9, 36(a0)
lw s10, 40(a0)
lw s11, 44(a0)
lw sp, 48(a0)
lw ra, 52(a0)
#ifndef __riscv_float_abi_soft
fld fs0, 56(a0)
fld fs1, 64(a0)
fld fs2, 72(a0)
fld fs3, 80(a0)
fld fs4, 88(a0)
fld fs5, 96(a0)
fld fs6, 104(a0)
fld fs7, 112(a0)
fld fs8, 120(a0)
fld fs9, 128(a0)
fld fs10, 136(a0)
fld fs11, 144(a0)
#endif
seqz a0, a1
add a0, a0, a1
ret

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.global __setjmp
.global _setjmp
.global setjmp
.type __setjmp, %function
.type _setjmp, %function
.type setjmp, %function
__setjmp:
_setjmp:
setjmp:
sw s0, 0(a0)
sw s1, 4(a0)
sw s2, 8(a0)
sw s3, 12(a0)
sw s4, 16(a0)
sw s5, 20(a0)
sw s6, 24(a0)
sw s7, 28(a0)
sw s8, 32(a0)
sw s9, 36(a0)
sw s10, 40(a0)
sw s11, 44(a0)
sw sp, 48(a0)
sw ra, 52(a0)
#ifndef __riscv_float_abi_soft
fsd fs0, 56(a0)
fsd fs1, 64(a0)
fsd fs2, 72(a0)
fsd fs3, 80(a0)
fsd fs4, 88(a0)
fsd fs5, 96(a0)
fsd fs6, 104(a0)
fsd fs7, 112(a0)
fsd fs8, 120(a0)
fsd fs9, 128(a0)
fsd fs10, 136(a0)
fsd fs11, 144(a0)
#endif
li a0, 0
ret

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.global __restore
.type __restore, %function
__restore:
.global __restore_rt
.type __restore_rt, %function
__restore_rt:
li a7, 139 # SYS_rt_sigreturn
ecall

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.global sigsetjmp
.global __sigsetjmp
.type sigsetjmp, %function
.type __sigsetjmp, %function
sigsetjmp:
__sigsetjmp:
bnez a1, 1f
tail setjmp
1:
sw ra, 152(a0)
sw s0, 164(a0)
mv s0, a0
call setjmp
mv a1, a0
mv a0, s0
lw s0, 164(a0)
lw ra, 152(a0)
.hidden __sigsetjmp_tail
tail __sigsetjmp_tail