fix PLT call offset in sh dlsym asm

the braf instruction's destination register is an offset from the
address of the braf instruction plus 4 (or equivalently, the address
of the next instruction after the delay slot). the code for dlsym was
incorrectly computing the offset to pass using the address of the
delay slot itself. in other places, a label was placed after the delay
slot, but I find this confusing. putting the label on the branch
instruction itself, and manually adding 4, makes it more clear which
branch the offset in the constant pool goes with.
This commit is contained in:
Rich Felker 2015-04-17 22:19:01 -04:00
parent 33615cd5ca
commit aecdbb3042
1 changed files with 3 additions and 3 deletions

View File

@ -4,8 +4,8 @@
.type dlsym, @function
dlsym:
mov.l L1, r0
braf r0
1: mov.l @r15, r6
1: braf r0
mov.l @r15, r6
.align 2
L1: .long __dlsym@PLT-(1b-.)
L1: .long __dlsym@PLT-(1b+4-.)