remove non-working pre-armv4t support from arm asm

the idea of the three-instruction sequence being removed was to be
able to return to thumb code when used on armv4t+ from a thumb caller,
but also to be able to run on armv4 without the bx instruction
available (in which case the low bit of lr would always be 0).
however, without compiler support for generating such a sequence from
C code, which does not exist and which there is unlikely to be
interest in implementing, there is little point in having it in the
asm, and it would likely be easier to add pre-armv4t support via
enhanced linker handling of R_ARM_V4BX than at the compiler level.

removing this code simplifies adding support for building libc in
thumb2-only form (for cortex-m).

arch/arm/reloc.h

@@ -28,10 +28,5 @@
 #define REL_TPOFF       R_ARM_TLS_TPOFF32
 //#define REL_TLSDESC     R_ARM_TLS_DESC
 
-#ifdef __thumb__
 #define CRTJMP(pc,sp) __asm__ __volatile__( \
 	"mov sp,%1 ; bx %0" : : "r"(pc), "r"(sp) : "memory" )
-#else
-#define CRTJMP(pc,sp) __asm__ __volatile__( \
-	"mov sp,%1 ; tst %0,#1 ; moveq pc,%0 ; bx %0" : : "r"(pc), "r"(sp) : "memory" )
-#endif

arch/arm/src/arm/atomics.s

@@ -11,8 +11,6 @@ __a_barrier:
 .global __a_barrier_dummy
 .hidden __a_barrier_dummy
 __a_barrier_dummy:
-	tst lr,#1
-	moveq pc,lr
 	bx lr
 .global __a_barrier_oldkuser
 .hidden __a_barrier_oldkuser
@@ -24,8 +22,6 @@ __a_barrier_oldkuser:
 	mov lr,pc
 	mov pc,ip
 	pop {r0,r1,r2,r3,ip,lr}
-	tst lr,#1
-	moveq pc,lr
 	bx lr
 .global __a_barrier_v6
 .hidden __a_barrier_v6
@@ -53,8 +49,6 @@ __a_cas_dummy:
 	ldr r0,[r2]
 	subs r0,r3,r0
 	streq r1,[r2]
-	tst lr,#1
-	moveq pc,lr
 	bx lr
 .global __a_cas_v6
 .hidden __a_cas_v6

crt/arm/crtn.s

@@ -1,11 +1,7 @@
 .section .init
 	pop {r0,lr}
-	tst lr,#1
-	moveq pc,lr
 	bx lr
 
 .section .fini
 	pop {r0,lr}
-	tst lr,#1
-	moveq pc,lr
 	bx lr

src/internal/arm/syscall.s

@@ -11,6 +11,4 @@ __syscall:
 	ldmfd ip,{r3,r4,r5,r6}
 	svc 0
 	ldmfd sp!,{r4,r5,r6,r7}
-	tst lr,#1
-	moveq pc,lr
 	bx lr

src/setjmp/arm/longjmp.s

@@ -33,9 +33,7 @@ longjmp:
 	ldcl p1, cr13, [ip], #8
 	ldcl p1, cr14, [ip], #8
 	ldcl p1, cr15, [ip], #8
-3:	tst lr,#1
-	moveq pc,lr
-	bx lr
+3:	bx lr
 
 .hidden __hwcap
 1:	.word __hwcap-1b

src/setjmp/arm/setjmp.s

@@ -35,9 +35,7 @@ setjmp:
 	stcl p1, cr13, [ip], #8
 	stcl p1, cr14, [ip], #8
 	stcl p1, cr15, [ip], #8
-3:	tst lr,#1
-	moveq pc,lr
-	bx lr
+3:	bx lr
 
 .hidden __hwcap
 1:	.word __hwcap-1b

src/string/armel/memcpy.s

@@ -189,8 +189,6 @@ less_than_32_left:
 	/* we're done! restore everything and return */
 1:      ldmfd   sp!, {r5-r11}
 	ldmfd   sp!, {r0, r4, lr}
-	tst     lr, #1
-	moveq   pc, lr
 	bx      lr
 
 	/********************************************************************/
@@ -378,6 +376,4 @@ copy_last_3_and_return:
 	/* we're done! restore sp and spilled registers and return */
 	add     sp,  sp, #28
 	ldmfd   sp!, {r0, r4, lr}
-	tst     lr, #1
-	moveq   pc, lr
 	bx      lr

src/thread/arm/clone.s

@@ -15,8 +15,6 @@ __clone:
 	tst r0,r0
 	beq 1f
 	ldmfd sp!,{r4,r5,r6,r7}
-	tst lr,#1
-	moveq pc,lr
 	bx lr
 
 1:	mov r0,r6

src/thread/arm/syscall_cp.s

@@ -22,8 +22,6 @@ __cp_begin:
 	svc 0
 __cp_end:
 	ldmfd sp!,{r4,r5,r6,r7,lr}
-	tst lr,#1
-	moveq pc,lr
 	bx lr
 __cp_cancel:
 	ldmfd sp!,{r4,r5,r6,r7,lr}