mirror of git://git.musl-libc.org/musl
fix build regression in arm asm for memcpy
commit 27828f7e9a fixed compatibility
with clang's internal assembler, but broke compatibility with gas and
the traditional arm asm syntax by switching to the arm "unified
assembler language" (UAL). recent versions of gas also support UAL,
but require the .syntax directive to be used to switch to it. clang on
the other hand defaults to UAL. and old versions of gas (still
relevant) don't support UAL at all.
for the conditional ldm/stm instructions, "ia" is default and can just
be omitted, resulting in a mnemonic that's compatible with both
traditional and UAL syntax. but for byte/halfword loads and stores,
there seems to be no mnemonic compatible with both, and thus .word is
used to produce the desired opcode explicitly. the .inst directive is
not used because it is not compatible with older assemblers.
This commit is contained in:
Rich Felker
parent
27828f7e9a
commit
9367fe9261
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@ -73,12 +73,12 @@ memcpy:
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*/
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movs r12, r3, lsl #31
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sub r2, r2, r3 /* we know that r3 <= r2 because r2 >= 4 */
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ldrbmi r3, [r1], #1
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ldrbcs r4, [r1], #1
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ldrbcs r12,[r1], #1
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strbmi r3, [r0], #1
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strbcs r4, [r0], #1
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strbcs r12,[r0], #1
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.word 0x44d13001 /* ldrbmi r3, [r1], #1 */
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.word 0x24d14001 /* ldrbcs r4, [r1], #1 */
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.word 0x24d1c001 /* ldrbcs r12,[r1], #1 */
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.word 0x44c03001 /* strbmi r3, [r0], #1 */
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.word 0x24c04001 /* strbcs r4, [r0], #1 */
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.word 0x24c0c001 /* strbcs r12,[r0], #1 */
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src_aligned:
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@ -101,10 +101,10 @@ src_aligned:
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/* conditionnaly copies 0 to 7 words (length in r3) */
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movs r12, r3, lsl #28
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ldmiacs r1!, {r4, r5, r6, r7} /* 16 bytes */
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ldmiami r1!, {r8, r9} /* 8 bytes */
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stmiacs r0!, {r4, r5, r6, r7}
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stmiami r0!, {r8, r9}
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ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
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ldmmi r1!, {r8, r9} /* 8 bytes */
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stmcs r0!, {r4, r5, r6, r7}
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stmmi r0!, {r8, r9}
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tst r3, #0x4
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ldrne r10,[r1], #4 /* 4 bytes */
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strne r10,[r0], #4
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@ -171,18 +171,18 @@ less_than_32_left:
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/* conditionnaly copies 0 to 31 bytes */
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movs r12, r2, lsl #28
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ldmiacs r1!, {r4, r5, r6, r7} /* 16 bytes */
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ldmiami r1!, {r8, r9} /* 8 bytes */
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stmiacs r0!, {r4, r5, r6, r7}
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stmiami r0!, {r8, r9}
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ldmcs r1!, {r4, r5, r6, r7} /* 16 bytes */
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ldmmi r1!, {r8, r9} /* 8 bytes */
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stmcs r0!, {r4, r5, r6, r7}
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stmmi r0!, {r8, r9}
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movs r12, r2, lsl #30
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ldrcs r3, [r1], #4 /* 4 bytes */
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ldrhmi r4, [r1], #2 /* 2 bytes */
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.word 0x40d140b2 /* ldrhmi r4, [r1], #2 */ /* 2 bytes */
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strcs r3, [r0], #4
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strhmi r4, [r0], #2
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.word 0x40c040b2 /* strhmi r4, [r0], #2 */
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tst r2, #0x1
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ldrbne r3, [r1] /* last byte */
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strbne r3, [r0]
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.word 0x15d13000 /* ldrbne r3, [r1] */ /* last byte */
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.word 0x15c03000 /* strbne r3, [r0] */
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/* we're done! restore everything and return */
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1: ldmfd sp!, {r5-r11}
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@ -224,11 +224,11 @@ non_congruent:
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* becomes aligned to 32 bits (r5 = nb of words to copy for alignment)
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*/
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movs r5, r5, lsl #31
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strbmi r3, [r0], #1
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.word 0x44c03001 /* strbmi r3, [r0], #1 */
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movmi r3, r3, lsr #8
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strbcs r3, [r0], #1
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.word 0x24c03001 /* strbcs r3, [r0], #1 */
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movcs r3, r3, lsr #8
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strbcs r3, [r0], #1
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.word 0x24c03001 /* strbcs r3, [r0], #1 */
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movcs r3, r3, lsr #8
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cmp r2, #4
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@ -355,23 +355,23 @@ less_than_thirtytwo:
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partial_word_tail:
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/* we have a partial word in the input buffer */
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movs r5, lr, lsl #(31-3)
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strbmi r3, [r0], #1
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.word 0x44c03001 /* strbmi r3, [r0], #1 */
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movmi r3, r3, lsr #8
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strbcs r3, [r0], #1
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.word 0x24c03001 /* strbcs r3, [r0], #1 */
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movcs r3, r3, lsr #8
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strbcs r3, [r0], #1
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.word 0x24c03001 /* strbcs r3, [r0], #1 */
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/* Refill spilled registers from the stack. Don't update sp. */
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ldmfd sp, {r5-r11}
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copy_last_3_and_return:
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movs r2, r2, lsl #31 /* copy remaining 0, 1, 2 or 3 bytes */
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ldrbmi r2, [r1], #1
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ldrbcs r3, [r1], #1
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ldrbcs r12,[r1]
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strbmi r2, [r0], #1
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strbcs r3, [r0], #1
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strbcs r12,[r0]
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.word 0x44d12001 /* ldrbmi r2, [r1], #1 */
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.word 0x24d13001 /* ldrbcs r3, [r1], #1 */
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.word 0x25d1c000 /* ldrbcs r12,[r1] */
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.word 0x44c02001 /* strbmi r2, [r0], #1 */
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.word 0x24c03001 /* strbcs r3, [r0], #1 */
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.word 0x25c0c000 /* strbcs r12,[r0] */
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/* we're done! restore sp and spilled registers and return */
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add sp, sp, #28
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